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ISARCSSim_dr
基于CS的一维距离像(HRRP)及FFT成像对比(CS-based HRRP and FFT HRRP)
- 2021-01-13 19:58:49下载
- 积分:1
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Verilog数字系统设计教程(第二版) 夏宇闻
Verilog数字系统设计教程(第二版) 夏宇闻(Verilog Digital System Design Course (2nd Edition) Xia Yuwen)
- 2020-06-20 18:40:02下载
- 积分:1
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TRY-1516-CSV0115--- SANGEETHA
说明: VHDL BASED DATA COMPRESSION
- 2019-01-01 16:37:53下载
- 积分:1
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verilog_16QAM.rar
使用verilog实现全数字16QAM调制器,载波频率1MHZ,数据比特流的速率为100Kbps,(the modulation of 16QAM based on FPGA)
- 2009-12-07 21:20:07下载
- 积分:1
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UART
实现了UART的底层协议,加入了控制器,其波特率可以根据使用进行调整;发送模块、接收模块相互独立,互不影响。(Realization of the underlying protocol UART, joined the controller baud rate can be adjusted according to use transmission module, receiver module are independent of each other.)
- 2013-11-30 13:25:21下载
- 积分:1
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quartus2tutorial
说明: 自己收集的quartus2 教程以及vhdl语言教程,和如何在quartus中使用modism仿真 ,希望对大家有用(Tutorial quartus2 own collection, as well as language tutorials vhdl and quartus how to use modism, useful for all of us hope)
- 2009-07-27 09:09:22下载
- 积分:1
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一般网站上都有i2c master模块的代码,但很少有slave的代码,这里就是slave的代码,非常有用....
一般网站上都有i2c master模块的代码,但很少有slave的代码,这里就是slave的代码,非常有用.-general website have i2c master module of code, but very few slave code, This is the slave code, very useful.
- 2022-07-18 10:45:08下载
- 积分:1
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router_routing
片上网络NOC基于fpga实现的,routing模块。(NOC-chip networks realized fpga-based, routing module.)
- 2021-03-03 17:19:32下载
- 积分:1
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smartWasher
QUARTER编程环境实现的智能洗衣机系统,通过DE0板子进行模拟,组要完成洗衣机5个步骤的顺序过程以及系统相应动作(QUARTER programming environment of intelligent washing system, through simulation DE0 board, groups 5 to complete the washing process and the system the sequence of steps corresponding action)
- 2020-11-06 13:19:49下载
- 积分:1
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RDA1846
rda1846 + pic18f2552 usb circuit schematic.
- 2012-09-12 20:05:38下载
- 积分:1