2。你可以以任何方式使用这个核心，无论是学术，商业，或

数字频率计 FPGA 用verilog语言编写-Digital Cymometer verilog language used FPGA

fpga程序，产生1pps脉冲信号，使用的verilog语言。(FPGA program generates 1 PPS pulse signal, using Verilog language.)

说明：  实现数字频率合成实验，加载数据ram,形成波形(The experiment of digital frequency synthesis is realized, and the data RAM is loaded to form the waveform)

一个NiosII可用的LCD12864 IPcore，含例子-A NiosII available LCD12864 IPcore, with examples

USB2.0的IP核开发.代码可以直接使用已经验证过(USB2.0 IP kernel development. Code can be used directly, has been verified)

基于VHDL+FPGA的DDS信号发生设计，已经通过调式-Based on VHDL+ FPGA design of the DDS signal has been through mode

protel fpga常用封装库1，非常难找的-protel fpga library a popular package is very difficult to find the

用verilog语言编写的4位算术逻辑单元ALU,功能参考74181，包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document

RAM控制的VHDL实现 真的很有用 -VHDL implementation of the RAM control true true useful useful

说明：  多摩川绝对值编码器的NRG协议源代码,我们公司用的，我修改的解码程序(Tamagawa NRG absolute encoder protocol source code, used by our company, I modified decoding process)