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ATEREAL EPM1270T144C5N CPLD
基于ATEREAL EPM1270T144C5N CPLD 压力传感器数据采集原码 开发软件 Quartus II -ATEREAL EPM1270T144C5N CPLD-based pressure sensor data acquisition source Quartus II development software
- 2022-02-06 01:07:35下载
- 积分:1
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I do view on the VHDL design options for the CPLD or FPGA to achieve HDB3 code
我上期做的VHDL设计方案,用于在FPGA或CPLD中实现HDB3的编码-I do view on the VHDL design options for the CPLD or FPGA to achieve HDB3 code
- 2022-10-15 14:00:02下载
- 积分:1
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sysgen_gs
Xilinx system generator
- 2020-12-25 15:39:04下载
- 积分:1
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xvrware图书馆Xilinx Inc.
XVRWARE Library Xilinx Inc.
The XVRWARE Synthesis library provides macros and synthesis examples for constructing TMR circuits in VHDL for the Virtex architecture
- 2023-07-20 21:50:04下载
- 积分:1
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cfo_correction
说明: OFDM载波同步,Verilog编写,完全正确!!!(verilog )
- 2020-11-05 21:39:50下载
- 积分:1
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DE2_NIOSII_uCOSII_2012
一个简单的UCOSII操作系统,在DE2上面调试通过(A simple UCOSII operating systems, debugging through the DE2 above)
- 2012-08-20 10:48:08下载
- 积分:1
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a2
说明: 用MATLAB设计及FPGA实现IIR滤波器的方法
摘要 本文介绍了IIR数字滤波器的传统设计思想与步骤及计算机辅助设计方法。并在FPGA上高效实现的低阶IIR滤波
器,其阶数低,实时响应快,适合雷达等的实时、高效处理环境。利用IIR滤波器的多相结构来实现该滤波器系统的方法,对于
四通道的情形在MATLAB上利用Simulink作了仿真, 并在目标板上对算法进行了实现,证明该系统能够同时处理四个通道的信号。(Using MATLAB Design and FPGA realization IIR Filter method Abstract This paper introduces IIR digital filter traditional design Thought and steps and CAD method. And FPGA on efficient realization low IIR filter, its order low, real response fast suitable radar real time, efficient processing environment. Use IIR filter multiphase structure realize the filter systematic method, for four channel circumstances in MATLAB on use Simulink made simulation and target board algorithm was realized proved system can simultaneously four channel signal.)
- 2010-04-01 17:10:21下载
- 积分:1
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DSP-keshe
设计题目:基于MATLAB的FFT算法的设计
设计内容:
所设计的FFT算法应完成以下功能:
(1)在MATLAB环境下编写FFT算法(不调用系统现有函数);
(2)实现对选定图片进行FFT计算、还原(IFFT计算),并与系统FFT函数做对比,进行分析;
(3)设计GUI界面。
(Design topics: content based on the the MATLAB FFT algorithm design design: the design of the FFT algorithm should perform the following functions: (1) the FFT algorithm written in MATLAB environment (do not call existing function of the system) (2) to achieve the selected picture for FFT calculation, restore (IFFT calculation) system FFT function analysis (3) design GUI interface.)
- 2013-04-09 16:51:00下载
- 积分:1
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一个可以综合的Verilog 写的FIFO存储器
内附文档说明
一个可以综合的Verilog 写的FIFO存储器
内附文档说明-a comprehensive Verilog can write FIFO memory attached document shows
- 2022-03-13 18:19:46下载
- 积分:1
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thesis
thesis for simple virus detection processor which is developed in xilinx
- 2015-02-18 23:51:11下载
- 积分:1