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BPSK
BINARY PHASE SHIFT KEYING
- 2014-08-20 17:35:44下载
- 积分:1
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RISC
32 bit RISC Processor with 3 stage pipeline
- 2010-03-03 00:09:16下载
- 积分:1
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这是一个fft的IP核,安装要求为quartus6.0以上。解压安装后可在quartus里例化使用,元件主要为cyclone和stratix,最大支持1024点...
这是一个fft的IP核,安装要求为quartus6.0以上。解压安装后可在quartus里例化使用,元件主要为cyclone和stratix,最大支持1024点的转换。
- 2022-01-28 08:13:42下载
- 积分:1
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simwindfarm-v1.0
GFHGFHGFH DFHFDHD GHDHFDHHFD DFHFDHDF
- 2021-04-11 22:08:57下载
- 积分:1
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8b10b Verilog
8bit/10bit编码Verilog实现(8bit/10bit Verilog Code)
- 2018-09-18 10:29:44下载
- 积分:1
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EMAC6
verilog实现的FPGA三态以太网链路层通信代码,里面有状态机,并按各个模块的功能分了文件夹,还有说明文档,自定义帧的产生和接收,开发环境为Xilinx ISE,测试无误。(verilog realization FPGA Tri-Mode Ethernet link layer communication code, which the state machine, according to the function of each module sub folder, as well as documentation, self-defined frame generation and reception, the development environment for the Xilinx ISEtest and correct.)
- 2013-01-09 00:04:20下载
- 积分:1
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LatticeECP3_SERDES_PCS_使用指南
LatticeECP3 SERDES/PCS 使用指南(LatticeECP3 SERDES/PCS usage guide)
- 2017-06-13 13:57:27下载
- 积分:1
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test1
利用matlab,对偏振控制器进行仿真,最终在邦加球上进行显示(Using matlab, simulation of the polarization controller eventually be displayed on the Poincare Sphere)
- 2013-04-07 10:42:15下载
- 积分:1
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4-code
设计一个十进制计数器,具有显示位置随计数时钟在八个数码管中左右滚动的功能。(Design of a decimal counter, a display position with the count clock in at around eight digital scrolling function.)
- 2016-05-24 17:00:31下载
- 积分:1
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以上是VHDL硬件描述语言写的一个简单锝路流水灯程序,希望对刚接触VHDL的朋友有一定帮助...
以上是VHDL硬件描述语言写的一个简单锝路流水灯程序,希望对刚接触VHDL的朋友有一定帮助-These are the VHDL hardware description language written in a simple flow path lights technetium procedures,刚接触VHDL want to have some friends to help
- 2023-08-06 14:45:02下载
- 积分:1