本文件是用CPLD（EPM7064）驱动线阵CCD（ILX509），其中包括原理图和程序...

说明：  this files describes how to build i2c block modules in verilog hdl and programming them on an fpga device

介绍了FPGA设计的十大准则，对初学者很有用，对于工作多年的同志，也会有整理总结的好处(Describes the FPGA design of the top ten criteria are useful for beginners, for many years comrades, there will be finishing the benefits of the summary)

以太网协议 TCP/IP/DHCP协议verilog实现(Ethernet IP/TCP/DHCP verilog source code)

这是个关于verilog入门的文档，有同志对verilog感兴趣，可以下载此文档，以供参考。(This is a verilog entry on the document, there are comrades of the verilog interested, you can download this document for reference.)

简要地说明时序约束的内容，对入门级的朋友相当起到引导的作用(Briefly describes the content of timing constraints on entry-level friends rather play a guiding role)

可实现两个4bit补码的加法及减法，有溢出提示(adder with overflow hint)

基于 CPU 的精确计时器，时钟频率越高，计时越准(Based on the exact CPU timer, the higher clock frequency, the more time-quasi-)

模块化分散聚集 DMA 是连续或非连续的转移。如正常 DMA 或散点图聚集 DMA 配置的输入或输出的部分。

4X4 KEYPAD 的密码比较模块，可以核对6位的密码-4x4 KEYPAD password comparison module, can check the password 6

verilog 语言实例，对于新手学习有很大帮助的实例-Examples of Verilog language, the novice has to learn very helpful examples of