Quantitative algorithm for FPGA HDL coding, including VHDL and Verilog code. Can...

VHDL语言设计的秒表，实现计时功能，实现报时功能，并且通过硬件实验。-VHDL language design stopwatch, timer function of the realization, the realization of time functions, and through hardware experiments.

由忆阻器机制设计蕴含逻辑，内含testbench仿真文件(Design implied logic by memristor mechanism, including testbench simulation file)

说明：  LVDS De-serialization

浅显易懂的vrilogHDL的程序，可以帮助你迅速上手-Easy and simple VerilogHDL programs to help you to get to the language quickly.

关于FPGA的一些例程，包括CORDIC数字计算机的设计，RS(204,188)译码器的设计等。(Some routines on FPGA include the design of CORDIC digital computers, the design of RS (204188) decoders, etc.)

这是一个基本的ARM7_Core 有基本功能 但不是太完善-This is a basic ARM7_Core has the basic functions, but not too perfect

DAC0832 接口电路程序.功能：产生频率为762.9Hz的锯齿波DAC0832VHDL程序与仿真-DAC0832 procedures interface circuit. Functions: generate the sawtooth frequency of 762.9Hz and simulation procedures DAC0832VHDL

VIVADO dma以及vdma 使用文档 基于ZYNQ 7020(vivado DMA&VDMA example text of zynq)

RD1006--I2C与存储器的IP 代码及说明文档，lattice提供，I2C Controller for Serial EEPROMs 源代码可用，并且包含tb文件-RD1006-- I2C and memory IP code and documentation. Lattice offer I2C Controller for Serial EEPROMs source code available, and document contains tb-

用VHDL编写的串口通讯程序，包括几个不同的程序例子，也可以用verilog进行改写。()