CH4CH2CH1VHDL 数字电路参考书所有程序5

xilink DPD V6.0 IP Core design example

8选1程序，是利用vhdl编写的，自己弄得还能用，上传下(8 Select a program is written using vhdl, allowed herself can use to upload the next)

使用Verilog实现的AD采样，很有用的！(Implemented using Verilog AD sampling, very useful!)

典型事例，从网上down的，希望对大家有用，-Typical examples, from the Internet down, and I hope useful for everyone,

MATLAB Filter Design HDL Coder Simunlink HDL Coder Xilinx ISE Webpack

采用倍频及1/3、1/12倍频绘制的路面不平度频谱图（自编）(Using octave and 1/3, 1/12 octave drawn road roughness spectrum (self))

ALTERA官方板子DE2官方代码，芯片是EP2C35F672C6N(ALTERA official board DE2 official code, the chip is EP2C35F672C6N)

VHDL写时钟，分频模块什么，实现计时。定点报时，定点闹钟，显示年月日。(verilog HDL)

VHDL实例,有近百个实例,都是可以在quarturs 上进行仿真的,大部分都可以通过,对初学者是一非常不错的-VHDL example, there are nearly a hundred examples, can be carried out in quarturs simulation, most of them can pass, for beginners is a very good

it is used to compile codec