完成PWM控制采用VHDL语言，你可以看看它。

基于VHDL实现加扰器解扰器的设计，与仿真。(VHDL-based scrambler descrambler design and simulation.)

altera DDR3 逻辑测试代码，这是工程实际调试好的代码，保证能用。(altera DDR3 vhdl code)

FPGA测序和DDS产生各种波形程序，用Atral器件开发(FPGA sequencing and DDS generate various waveform programs.)

FPGA开发板上写的Verilog代码： 功能是从电脑端发送一个字节，然后把它接收回来。 -FPGA development board to write the Verilog code: function is from the client computer sends a byte, and then receive it back.

改写四号中断的 自己编的，，，，，，求过啊！！！一个很简单的小程序(Rewrite the fourth interruption of their series,,,,,, begged ah! ! ! A very simple little program)

使用FPGA完成AGC 自动增益的代码，适合初学者(FPGA to complete the use of AGC automatic gain code, suitable for beginners)

说明：  基于FPGA的QPSK系统仿真及验证，硬件部分。(Simulation and verification of QPSK system based on FPGA)

VHDL cyclic redundancy check generator und receiver

Verilog Blocking and Non Blocking

六十进制计数器，显示0到60.可以用数码管显示。(Six decimal counter 0-60 can use the digital display.)