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RGB_Driver
串口收发程序,成功通过仿真,可以用来学习(Serial transceiver,It is successful through simulation and can be used to learn)
- 2020-10-28 14:00:00下载
- 积分:1
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《HELLO FPGA》-软件工具篇
说明: 学习使用quartus modelsim(learn to uee quartus modelsim)
- 2020-03-18 09:24:22下载
- 积分:1
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Signed-Arithmetic-in-Verilog-2001
有符号数的完整讲义和例子Verilog 2001(Signed Arithmetic in Verilog 2001, paper with examples)
- 2011-01-18 17:15:09下载
- 积分:1
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vhdl
vhdl常见小实验代码,包括二进制比较器,4选1,8421十进制,8421转化成格雷码,8421余三码,分频器,数据码译码器,二进制减计数器,四位环形计数器等(VHDL common small experiment code)
- 2020-06-24 13:00:02下载
- 积分:1
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velocity_Verilog
速度表(velocity)要求:1.显示汽车Km/h数;2.车轮每转一圈,有一传感脉冲;每个脉冲代表1m的距离;3.采样周期设为10s;
4.要求显示到小数点后边两位;5.用数码管显示;6. 最高时速小于300Km/h。(约为83.3m/s)
(use verilog to realize velocity)
- 2020-07-13 15:08:51下载
- 积分:1
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uart
一个实用的uart协议模块,使用verilog 实现(A practical uart protocol modules, use verilog to achieve)
- 2013-07-25 11:43:34下载
- 积分:1
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altera的ip核,在sopcbuilder中添加后,在niosII IDE中可以用一条语句实现,音频解码的输出。...
altera的ip核,在sopcbuilder中添加后,在niosII IDE中可以用一条语句实现,音频解码的输出。-altera
- 2022-03-05 12:43:51下载
- 积分:1
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avoidance-radar
汽车在防撞雷达方向的研究的详细原理的介绍(Introduction of detailed schematic of the car in the direction of the anti-collision radar)
- 2013-01-06 14:01:47下载
- 积分:1
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FPGA_CPLD-SHC
FPGA_CPLD-SHC多款FPGA CPLD开发板的原理图,很好的线路设计参考(FPGA_CPLD-SHC Variety of FPGA CPLD development board schematics, a good reference circuit design)
- 2013-03-04 23:36:01下载
- 积分:1
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Can be directly used for engineering applications of CRC checksum inside VHDL co...
可以直接用于工程应用的crc校验VHDL编码
里面有详细的规格书-Can be directly used for engineering applications of CRC checksum inside VHDL code has detailed specifications
- 2022-08-03 19:10:27下载
- 积分:1