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IIC总线协议,VHDL语言编写,可以直接使用
IIC总线协议,VHDL语言编写,可以直接使用-IIC bus protocol, VHDL language can be used directly
- 2022-07-11 11:04:33下载
- 积分:1
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cf_ad9649_ebz_edk_14_4_2013_03_19.tar
说明: ad9649的fpga驱动程序,FMC接口,基于Xilinx KC705(AD9649 Evaluation Board, FMC Interposer & Xilinx KC705 Reference Design)
- 2020-06-28 14:00:02下载
- 积分:1
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UART_Send_handle
这是一个很好的基于verilog的串口通信422模块,已经经过多次验证,绝对可靠,可直接使用,本人已在工程中多次使用,无误差(This is a good serial communication based on Verilog 422 module, has been repeatedly verified, absolutely reliable, can be used directly, I have repeatedly used in the project, no error)
- 2021-04-07 15:49:01下载
- 积分:1
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利用verlilog hdl语言编程,完成了8051内核,非常值得学习硬件描述语言的人看看!...
利用verlilog hdl语言编程,完成了8051内核,非常值得学习硬件描述语言的人看看!-Verlilog hdl programming language to use to complete the 8051 core, very much worth learning hardware description language of the people to see!
- 2023-02-04 05:25:03下载
- 积分:1
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FIR低
fir低通滤波器 用于dspbuilder pll:25ns data 400khz sin 10.8khz-fir low-pass filter for dspbuilder pll: 25ns data 400khz sin 10.8khz
- 2023-05-01 00:45:03下载
- 积分:1
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使用LPM_ROM的实际的例子
使用LPM_ROM的实际的例子-Use of practical examples LPM_ROM
- 2022-10-03 13:00:03下载
- 积分:1
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lanqiu24s8
篮球24s计时。计时器递减计数到零时,数码显示器显示‘0’并停止,同时发出报警信号(basketball 24 seconds)
- 2012-06-11 16:04:01下载
- 积分:1
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lut_multiplier
使用verliog设计实现LUT查找表乘法器,通过modelsim仿真验证通过(Designed and implemented using the LUT lookup table verliog multipliers, through simulation by modelsim)
- 2021-04-09 10:18:59下载
- 积分:1
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With VHDL Design and Implementation of the multi
用vhdl设计实现的多功能电子钟,可有日历,闹钟,修改等多种功能-With VHDL Design and Implementation of the multi-functional electronic bell, can have a calendar, alarm clock, to amend a variety of functions such as
- 2022-03-11 03:55:41下载
- 积分:1
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Verilog代码。注册成功,对FPGA的使用标准单元库…
verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
- 2022-04-14 16:29:39下载
- 积分:1