一些较为经典的VHDL代码,专注于信号分析与检测方面

将VHDL程序下载到DE2开发板，引脚分配时需要知道的芯片每个引脚功能(VHDL program will be downloaded to the DE2 development board, you need to know when the pin assignments for each pin of the chip functions)

最终FFT 64点使用定点。

Verilog-HDL程序设计实用教程收集，内容丰富，设计技巧多样。-Verilog-HDL Design Tutorial practical collection, rich in content and variety of design skills.

qpsk调制解调，结果可以通过示波器进行观察(qpsk modulation and demodulation, the results can be observed by an oscilloscope)

this files in Quartus2 are fulladder

利用FPGA实现对外设按键的控制，例如用户库用按键控制跑马灯的效果(FPGA is used to realize the control of external keys, such as the effect of user database using keys to control the running horse lamp)

OFDM完美出图，信噪比，16QAM星座图，加窗信号时域和频域波形图(Perfect figure, OFDM SNR, 16 qam constellation diagram, add window signal time domain and frequency domain waveform figure)

说明：  displayport 参考设计，可以对比自己工程做验证，另有参考设计XAPP1178未找到，采用方案为DP159 + Artix7 FPGA(xilinx displayport sink design)

xlinx sparten 3E实验板，实现时钟闹钟功能，闹钟播放电子音乐，时钟，闹钟通过LCD屏显示。自己写的，亲测可用。                                                                                                                    

说明：  有关risc-v cpu的问题,里面有一些有关cpu的设计(The problem of risc-v can be solved)