通过VGA接口获取视频输出的VHDL代码

说明：  agilex fpga description

此功能是实现曼彻斯特编码的Verilog代码，经过在xilinx sp6上实际运行证实可行。(This function is to achieve the Manchester code Verilog code, through the Xilinx SP6 actual operation proved.)

用FPGA控制1602型液晶显示，显示一行英文语句。(show)

基于DDS的BPSK调制器设计Verilog源码( U57FA u4E8.08 u868)

VHDL实现交通灯-VHDL traffic lights

MAX481、MAX483、MAX485、MAX487-MAX491以及 MAX1487是用于RS-485与RS-422通信的低功耗收发器， 每个器件中都具有一个驱动器和一个接收器(The MAX481, MAX483, MAX485 The MAX487-MAX491, and MAX1487 low-power transceivers for RS-485 and RS-422 communication, each device has a drive and a receiver)

下采样与灰度

用VHDL语言编程完成数码管0-255数字的显示-VHDL language programming with the 0-255 number to complete the display of the digital control

LCD显示超级玛丽游戏2 (LCD display Super Mario game)

Token Bucket Filter queue.