串口程序，基于VHDL 的，很好的程序 快下吧

自编的64B/66B编码程序，下次上传解码程序。(the 64B/66B coding process is written by myself, i will upload the decoding process next time.)

16位并行相关器的VHDL程序-16 parallel with the VHDL-related procedures

vhdl语言，国外教材，数字信号处理算法(vhdl language, foreign materials, digital signal processing algorithms)

数字频率计VHDL程序 --文件名：plj.vhd。 --功能：频率计。具有4位显示，能自动根据7位十进制计数的结果，自动选择有效数据的 --高4位进行动态显示。小数点表示是千位，即KHz。-Digital Cymometer VHDL procedures- File name: plj.vhd.- Function: frequency meter. With four shows that will automatically count seven decimal results, automatic selection of effective data- four for the high dynamic display. Decimal point that is 1000, or KHz.

基于FPGA的图像采集卡的设计与相关说明-FPGA-based design of frame grabbers and related note

适用于满足I2C协议的flash读/写操作程序，只需要设置要读/写的字节数，就可以直接使用！-Applicable to meet the I2C protocol flash read/write operations, only need to set to read/write number of bytes can be used directly!

这是一篇现代通信原理课程的作业报告.题目为几种时频分析方法比较及应用.详细介绍了短时傅里叶变换、小波变换、魏格纳—威利分布和Cohen类时频分布这4种典型时频分析方法,并作了比较(This is a modern communication Principle operating report. Entitled Comparison of several time-frequency analysis and 应用. 详细 Jieshao the short time Fourier transform, wavelet transform, Wigner- Willie distribution and frequency distribution of Cohen Lei This four kinds of typical time-frequency analysis method, and compared)

有符号16位乘法器。经典booth编码。拓扑结构为wallance树。加法器类型是进位选择加法器。(Number system: 2 s complement Multiplicand length: 16 Multiplier length: 16 Partial product generation: PPG with Radix-4 modified Booth recoding Partial product accumulation: Wallace tree Final stage addition: Carry select adder )

本文为verilog的源代码-In this paper, the source code for Verilog

BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)