4dbpsk系统的设计实现源码，几个朋友用一个假期的时间协作完成，功能非常好...

VerilogHDL教程，很详细全面的Verilog教程，循序渐进，由浅入深，十分好的学习资料(VerilogHDL tutorial, very detailed and comprehensive Verilog tutorial, step by step, progressive approach, a very good learning materials)

基于芯片MAX502的十二位并行DAC芯片的程序，利用FPGA中的ROM查表进行数据存储-Based on 12 of the MAX502 chip DAC chips in parallel procedures, the use of FPGA in the ROM look-up table for data storage

利用fpga实现的DDS，可输出正弦波，输出频率可调-FPGA realization of the use of DDS, sine wave output, output frequency adjustable

Xapp 200 64 bit DDR SDRAM design files for Xilinx Vertix

VGA interface using Spartan3E board from DIGILENT.Labview .vi

看了好多网了，发现有2to4译码，3to8译码，今天我要用4to16译码，写完了就发了上来-saw a lot of net and found 2to4 decoding, 3to8 decoding, today, I must 4to16 decoding, finished on the fat in the ranks

一些常见的小模块，自己写的，可能不是特别好，仅供参考，主要是分频器、计数器和数码管的显示

it is a new describng system for it field

设计并制作一个14键单音电子琴预先存入一些曲谱电路在4Hz的时钟控制下自动播放 通过220V电源适配器给电路提供工作电源-Design and production of a 14-key electric piano tone into a number of music scores advance in 4Hz clock circuit under the control of automatic play through 220V power adapter to provide power to the circuit