4dbpsk系统的设计实现源码，几个朋友用一个假期的时间协作完成，功能非常好...

乐曲演奏电路，能演奏歌曲，同时在数码管上显示演奏的乐曲音符的数字。-Music concert circuit, can play songs at the same time in the digital tube displays the number of notes played music.

《Verilog HDL 程序设计教程》3-"Verilog HDL Design Guide" 3

说明：  基于FPGA，用verilog hdl语言实现串口收发实验(Based on FPGA, using Verilog HDL language to achieve serial port transceiver experiment)

FPGA实现DSP的Verilog 示例(FPGA realization of DSP-Verilog Example)

数字频率计的设计，显示0~999的频率 整个程序代码都是通过vhdl语言来完善的 功能模块多样，详细的介绍了多模块的各个功能

说明：  利用vhdl语言编写的译码器程序，采用两种不同方式(The use of language decoder vhdl program, using two different ways)

通信中卷积交织/解交织FPGA源程序，采用verilogHDL代码实现，包含测试程序，经过验证。(Communication in the convolutional interleaving/de interleaving FPGA source program, using verilogHDL code to achieve, including test procedures, after verification.)

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半加器

通信中常用的PN序列产生器的源代码全部打包(Communications commonly used in PN sequence generator, the source code of all packaged)