这是一个测试键盘的代码

VHDL开发环境，四人抢答器，实现了四个人能同时抢答的功能。-VHDL development environment Answer four, and the realization of the four functions at the same time Answer.

闹钟设计，VHDL，源代码。闹钟设计，VHDL，源代码。(Alarm clock design, VHDL, the source code.)

Encryption has become a part and parcel of our lives and we have accepted the fact that data is going to encrypted and decrypted at various stages. However, there is not a single encryption algorithm followed everywhere. There are a number of algorithms existing, and I feel there is a need to understand how they work. So this text explains a number of popular encryption algorithms and makes you look at them as mathematical formulas.

基于fpga状态机的交通灯设计，亮灯时间自己修改，程序简单易懂。(Traffic light design based on FPGA state machine, light time self-modifying, the program is simple and easy to understand.)

verilog实现的1024位的大数模逆算法，引入RAM作为数据通道-verilog to achieve the 1024 Modular inverse algorithms, the introduction of RAM as a data channel

这个是vhdl中很常见的jk filpflop的文件只用于很小数位的变化 其中的jk文件是up down运算都符合的(This is a very common vhdl jk filpflop file is only used for very small changes in a digital file which jk is up down operations are met)

is61lv25616简单的verilog程序，完成sram读写(is61lv25616 simple verilog program, complete sram read and write)

8051单片机VHDL内核,内有说明,很详细,值得下载-8051 VHDL core, which has made it clear that, in great detail, it is worth downloading

UART文件 包括发送器 接收器 fifo 测试文件(UART file includes a receiver transmitter fifo test files)

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