VHDL language used hardware realize the serial communication of test code that c...

这个是用VHDL实现FPGA对FLASH的读写。(This is achieved using VHDL FLASH FPGA to read and write.)

Quartus II软件设计数字电子钟，使用verilog语言编写各个 模块生成symbol files，再用原理图方式制作顶层文件。 完成的功能有：能够显示时、分、秒；具有清零，调节分钟的功能； 具有整点报时功能，声响电路发出叫声； (failed to translate)

quartus ii 环境下，一个完整的利用TEXTIO仿真的源代码，包括读数据文件和输出数据到文件。(Under quartus ii environment, a complete simulation using TEXTIO source code, including reading data files and output data to a file.)

通过串口发送，实现FPGA与stm32的dds发生器(Implementation of DDS generator)

DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M

给予QPSK调制的OFDM例程，简单明了的表述了OFDM的通信原理(Given OFDM QPSK modulation routine, simple expressions of OFDM communication theory)

基于PCI总线和LPC接口的POST主板诊断卡代码，已经通过fpga测试可以使用，性能非常稳定。(Based on the PCI bus and LPC POST motherboard diagnostic card code to interface fpga has passed the test can be used, the performance is very stable.)

Altera官方FPGA电机控制的中文文档，很不错的参考资料(Altera Official FPGA Motor Control Chinese Document, Good Reference)

这是一个nios工程，控制TFT液晶屏的程序。FPGA平台用Verilog HDL语言编写的，MCU软核程序有C语言编写。通过这一个完成的工程，你就会明白SOPC的一些实现方法。(This is a nios engineering, control TFT LCD screen program. The FPGA platform Verilog HDL language preparation with the nuclear program has a soft, MCU written in C language. Through this a complete project, you will understand some of the SOPC methods of realization. )

压缩包是ti xds100v3 Design kit的安装文件，安装后有原理图、PCB文件，与DSP接口采用FPGA，安装后有源码，是VHDL格式的，支持开源，降低开发成本(Compression package is ti xds100v3 Design kit installation file after installation schematics, PCB files, and DSP interface with FPGA, after installation source is VHDL formats, support for open source, reduce development costs)