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RS(255,247)编码解码器Verilog源代码
说明: RS(255,247)编码解码器Verilog源代码(Verilog source code of RS (255247) codec)
- 2021-02-08 17:09:54下载
- 积分:1
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VGA_Test
说明: 基于FPGA的VGA驱动代码VHDL
在显示屏显示一个汉字(FPGA-based VHDL code of the VGA driver that a character in the display)
- 2009-08-10 14:55:27下载
- 积分:1
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Masseffect-3---Jane-Shepard
超級好用
25M~100HZ的除頻器
寫了好久 超級實用
歡迎下載(Super easy to 25M ~ 100HZ of divider wrote a long time super practical welcome to download)
- 2013-09-13 13:33:13下载
- 积分:1
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apb timer
说明: 是基于apb总线下的timer外设的rtl代码,主要包括apb_timer的master逻辑verilog,以及相应的开发文档,包括寄存器的描述,功能特性等。(RTL code is based on timer peripheral under APB bus, which mainly includes master logic Verilog of apb_timer and corresponding development documents, including the description of registers, functional characteristics and so on.)
- 2019-01-25 16:54:02下载
- 积分:1
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RS485
verilog开发FPGA,实现RS485串口通信(RS485 driver for FPGA )
- 2021-02-08 06:49:54下载
- 积分:1
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04_led_test
FPGA控制外边led,并实现跑马灯等多种效果,用户可以自行控制(FPGA control outside led)
- 2020-06-16 09:40:02下载
- 积分:1
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基于超大规模集成电路内建自测试SOC
AMBA设计和AHP桥梁SoC解决方案和测试策略。它是利用Xilinx和SIM模式和综合结果表明握手的两个通信协议
之间更好的预测。的设计示出了在有效的面积和速度方面。
- 2022-03-16 09:13:25下载
- 积分:1
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Building the CPU datapath
Building the CPU datapath
- 2022-07-24 12:10:47下载
- 积分:1
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基于FPGA的高性能32位浮点FFTIP核的开发,适合fpga工程技术人员参考...
基于FPGA的高性能32位浮点FFTIP核的开发,适合fpga工程技术人员参考-FPGA-based high-performance 32-bit floating-point nuclear FFTIP development, engineering and technical personnel for reference fpga
- 2022-10-24 15:10:04下载
- 积分:1
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shperedecode
基于软输出固定复杂度球形译码的高效迭代检测算法,最新的球形译码论文(Iterative detection algorithm based on a fixed complexity soft-output sphere decoding efficiency, sphere decoding papers)
- 2012-09-07 20:36:21下载
- 积分:1