bits FIFO with synchronizer. Pass the sy nthesis using Synopsys tools

用于视频运动图像编码的HUFFMAN编码，可广泛运用于MPEG-Moving Picture for video coding Huffman coding, can be widely applied to MPEG

pid程序,新学者，使用FPGA学习，希望大家一起学习

thesis about design and implementation neural network using FPGA

在SOPC下制作自定义部件（PWM发生器）的源程序，包括硬件描述HDL文件和驱动程序文件-Produced in the SOPC custom component (PWM generator) of the source, including hardware description HDL files and driver files

一种基于格雷码的异步FIFO设计与实现,8*8位的fifo VHDL 源码-Gray-code based on the Asynchronous FIFO Design and Implementation

采用vhdl语言实现12路的pwm波控制。-Language implementation using vhdl wave pwm control of the road 12.

一个简易的频率计，主要用检测在一定范围内的频率，当然频率过大会有误差(A simple frequency meter, mainly used for testing in a range of frequencies, of course, frequency of errors over the General Assembly)

基于Basys3的数字钟实例，主要用于Basys3、vivado开发环境入门。源码使用VerilogHDL(Based on digital clock instance Basys3, mainly for Basys3, vivado development environment started. Use Code VerilogHDL)

基于DE2的视频电话部分源码，实现了视频图像采集，VGA显示，局域网通讯等功能-DE2-based video telephony part of the source code to achieve the video image capture, VGA display, LAN communications function

说明：  i2c module，有i2c主机和从机模块(i2c module verilog VHDL base on i2c protocol)