bits FIFO with synchronizer. Pass the sy nthesis using Synopsys tools

说明：  一款verilog设计的SRAM控制器，可以实现AHB总线控制的功能。(abcdefghijklmnopqrstuvwxyz)

十进制计算机，实现十进制计数功能，简单可靠(vhdl)

FPGA中FLASH配置控制源码,VHDL和Verilog(FPGA source code in the FLASH configuration control, VHDL and Verilog)

对视频编解码芯片ADV7181进行合理的配置，使其输出符合ITUR656标准的视频流-Of the ADV7181 video decoder chip for a reasonable configuration, so that the output in line with the standard video streaming ITUR656

 本程序应用VHDL硬件描述语言，以QuartusⅡ8.0为开发工具设计了一个具有自动演奏乐曲功能的系统，演奏乐曲为《梁祝》，具有单曲播放器功能。本程序简单易懂，可作为FPGA入门学习之用。

贪吃蛇程序，用verilog实现，可以运行只要修改一下相应的FPGA芯片类型和VGA接口相应的引脚(Snake program, using Verilog to achieve, you can run as long as the appropriate to modify the corresponding FPGA chip type and VGA interface to the corresponding pin)

ANALYSIS OF D-FLIPFLOPS

RS译码的Euclid算法及其FPGA实现，并通过仿真器的出结果，对于设计ＲＳ译码很有帮助-RS decoding Euclid algorithm and its FPGA implementation, and through the simulator results are helpful for the design of RS decoder

verilog程序设计教程，适合初学者。-verilog programming tutorial for beginners.

DDS的VHDL程序，相当好，值得下载，共享才是王道(DDS, VHDL program is quite good, worth downloading, sharing is king)