在spartan－3e上利用八个led实现流水灯效果

DDR2-400样例源代码，用于Xilinx Spartan 3A/3AN Starter Kit(DDR2-400 sample source code for Xilinx Spartan 3A/3AN Starter Kit)

测量周期,此程序已经在EP2C板子上成功实现(mesure cycle)

说明：  sd卡的verilog代码，包含一些sd卡例程(SD card Verilog code, including some SD card routines)

A program for a simple decoder using ModelSim6

This is an UART real time clock

十进制精确计数，经典写法，便于学习与参考，供大家分享-Decimal precision counts, classic written, easy learning and reference for all to share

Xilinx Sysgen User Guide

说明：  资料的内容是实现旋转机械同步整周期采样的数据采集系统相关文献资料，包括鉴相信号如何倍频，机械振动信号相位如何检测等的实现方法。(Information content is for rotating mechanical synchronization synchronous sampling data acquisition system-related documents, including the Kam-believe number to harmonic mechanical vibration signal phase to detection of realization.)

其中两个项目自己做的：一个是雷达模拟跟踪，基于FPGA/CPLD的，里面包含了PCB和VHDL码，还有一个是SDIO的驱动程序（包括PCB原理图，SDIO协议方面的资料还有就是源码，这项目可用），还有一些嵌入式方面的资料，如TCP/IP协议栈的实现，FPGA的一些仿真实例(Two of the projects themselves to do: a tracking radar simulator is based on FPGA/CPLD)

用FPGA实现dct变换。verilog语言实现，在quartus9.0中验证，含整个工程(dct transform verilog language in quartus9.0 verify, with the entire project)