在spartan－3e上利用八个led实现流水灯效果

基于alteraCPLD芯片的VHDL点阵滚动显示源代码-VHDL-based alteraCPLD chip dot matrix rolling display the source code

定时器加数码管显示源码，以及test bench测试模块源码，经modelsim仿真结果正确(Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct)

蛋蛋助手,可以动态配置生成代码格式,方便ORM或或程序员的生成工作 ，经测试 (Egg assistant, can be dynamically configured to generate code format, convenient ORM, or programmer generation work, tested)

使用VERILOG开发时钟同步算法，能够从数据信号中提取时钟信息，(Clock synchronization algorithm using VERILOG developed to extract the clock from the data signal information,)

cordic的verilog程序 用ＦＰＧＡ实现-CORDIC FPGA using the Verilog procedures realize

NIOS II IDE 编程， uart_txd测试程序，仅供参考。-NIOS II IDE programming, uart_txd testing procedures, for information purposes only.

本书共由三篇组成。其中第一篇由第1~3章组成，介绍PCI总线的基础知识。第二篇 由第4~13章组成，介绍PCIExpress总线的相关概念。第二篇的内容以第一篇为基础。(This book comprises a total of three components. The first chapter from the first 1-3 chapters, introduces the basics of the PCI bus. Second by the first 4 to 13 chapters, introduces concepts related PCIExpress bus. The contents of the first to second basis.)

该程序是在d，t，jk触发器上用vhdl语言编写的

用verilog编程的TCON模块（时序控制器）的程序(Verilog programming module with TCON (timing controller) program)

本代码实现了输出移位寄存器功能，初学者可以借鉴学习-This code implements the output shift register functions, beginners can learn to learn