vhdl N

完成的是RS422信号的计数功能，并产生一定的触发信号-RS422 signals the completion of the count function, and produce a certain trigger signals

4位MCU AM2901的完整VHDL程序，AM2901为主程序，其他为实体库-4 MCU AM2901 complete VHDL program, AM2901-based procedures, other entities, the Treasury

串口收发，实现可调波特率的串口通信，verilog源码(Serial port and transceiver)

：采用FPGA来实现一个基于OFDM技术的通信系统中的基带数据处理部分，即调制解调器。其中发射部分的调制器包括：信道编码（Reed-Solomon编码），交织，星座映射，FFT和插入循环前缀等模块。我另外制作了相应的解调器，可以实现上述功能的逆变换。(: Using FPGA to implement a technology-based OFDM communication systems in base-band data processing part of the modem. One part of the modulator launch include: channel coding (Reed-Solomon coding), interleaving, constellation mapping, FFT and cyclic prefix insertion modules. I also produced a corresponding demodulator can achieve the above-mentioned inverse transform function.)

The AGC is a smart programmable gain amplifier (PGA). The amplifier gain is adjusted based upon the input signal level so that the output is at a specified Target Gain. The AGC can be configured to be either a mono or stereo input / output component. For illustration purposes, the following discussion will highlight the stereo configuration.

verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，3-6章-Verilog HDL 135 cases Guide : Verilog HDL language similar to the C language, to facilitate learning. This document with the source code, 3-6

very good code for edge detection based on vhdl programming.

基于QUATEUS2的设计一个8位频率计verilog语言编程(The design is based QUATEUS2 an 8-bit frequency counter verilog programming language)

MATLAB Filter Design HDL Coder Simunlink HDL Coder Xilinx ISE Webpack

关于XILINX FPGA 内部 中文培训教材-XILINX FPGA on internal training materials in Chinese