vhdl N

《Verilog HDL 程序设计教程》9("Verilog HDL Design Guide" 9)

matlab随即图设计程序，应该比较有用，希望能申请会员成功吧。。(matlab then drawing design program)

Design HDL code for a circuit that calculates the Hamming distance of two 8-bit inputs.

设计一4位比较器,画出门级电路图,用verilog语言完成设计。 (Design a four comparators, drawing out level circuit diagram, complete the design using verilog language. )

通过UART在FPGA数码管上显示经纬度坐标的代码(By UART displayed on FPGA digital latitude and longitude coordinates of the code)

直接数字式频率合成器DDS设计、Verilog。 产生的信号可以是正弦波或方波、三角波、锯齿波等，自选。 采用DDS技术，将所需生成的波形写入ROM中，按照相位累加原理合成任意波形。 此方案得到的波形稳定，精度高，产生波形频率范围大，容易产生高频。 本实验在设计的模块中，包含以下功能： （1）通过 freq 信号输入需要的频率的值； （2）通过 wave_sel 信号选择所需的波形； （3）通过 amp_adj 信号选择波形放大的倍数。(DDS design of direct digital frequency synthesizer, Verilog. The generated signal can be sinusoidal or square wave, triangular wave, sawtooth wave and so on, optional. By using DDS technology, the required waveforms are written into ROM, and arbitrary waveforms are synthesized according to the principle of phase accumulation. The waveform obtained by this scheme is stable, accurate and easy to generate high frequency waveform. This experiment includes the following functions in the designed module: (1) Input the required frequency value through freq signal; (2) Choosing the required waveform by wave_sel signal; (3) Select the multiplier of waveform amplification by amp_adj signal.)

VHDL开发环境，出租车计费系统，实现起步10元，每增加一公里，自动上涨2元。-VHDL development environment, taxi billing system to achieve the initial 10 yuan for each additional mile, automatic up 2.

说明：  在quartus上运行16QAM仿真，实现在modelsim上的波形仿真(Running 16QAM simulation on quartus)

用Verilog HDL编写的VGA显示驱动程序-Verilog HDL prepared with VGA display driver

xilinx accel dsp实例项目工程-xilinx accel dsp project