vhdl N

总结设计中的重点及注意的地方，常出现错误的地方等。-Summarize the design of the focus and attention of local, often the wrong place and so on.

用FPGA实现pwm调制波，通过单片机软核控制输入量来实现任意占空比方波的产生-wave

FSK/MSK/GFSK/GMSK DIGITAL DEMODULATOR VHDL SOURCE CODE OVERVIEW

用VHDL语言来实现一个电子时钟，可以调时间。小时，分，秒。可以下载到实验箱来运行验证。-use VHDL to achieve an electronic clock, the time can be set aside. Hours, minutes and seconds. Experiments can be downloaded to the box to run test.

4tap FIR filter in verilog code

spi接口的eeprom模型，型号为st公司m65pxx(The eeprom model of spi interface is st company m65pxx)

FPGA AD采集八路数据，12位分辨率，小梅哥FPGA的开发程序，实测可用(FPGA AD collects eight path data, 12 bit resolution, and the development program of Mayo FPGA.)

基于FPGA，利用VHDL语言对小车循迹进行设计。(Car tracking)

DDS实验 matlab 与quartus 的完美结合(DDS experimental combination of matlab and quartus)

美国人写的各种类型的fpag设计指导，非常详细的介绍了从fpga的型号，结构，实现，编程，等各个方面的要点。-Written by Americans of all types of fpag design guide, very detailed introduction from the FPGA models, structure, realize, programming, and other aspects of the main points.