由于在网上很难下载到EDA技术－窦衡的PPT，所以本人经过学习后做成word，供大家下载。只针对VHDL语言部分和所有的程序。...

SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)

异步FIFO的设计 包括testbench 已调试成功-Asynchronous FIFO design includes testbench debug success has been

浮点数运算的FPGA实现，包括仿真文件。-FPGA realization of floating-point operations, including the simulation file

verilog写的频率计程序的计数模块,-Verilog written procedures for counting frequency meter module,

华为内部资料，包括verilog电路设计，硬件工程师手册，verilog约束，synplify使用指南等。内容较全面。(Huawei internal information, including verilog circuit design, hardware engineers manual, verilog constraints, synplify use guides. Content more comprehensive.)

DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的-DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good

verilog编写的QPSK发射机的ＦＰＧＡ部分，已经过验证，完全达到要求。调制矢量误差４％(QPSK transmitter verilog prepared by the FPGA portion, has been proven, fully meet the requirements. Modulation vector error of 4 )

一个三分频verilog模块，可以用来学习基本结构。(A three points frequency verilog module can be used to study the basic structure.)

基于FPGA的交通灯代码，VHDL语言书写。适合新手学习vhdl语言时使用(FPGA-based traffic light code, VHDL language writing. Suitable for novice learning vhdl language used when)

entity or1 is(a,b:in std_logic;y:out std_logic);architecture dataflow of or1 isbeginy