USB+FPGA电路设计原理图，实际的电路板运行正常，很有参考意义。...

vhdl状态机设计,文件简单详细易懂，可以使用在交通灯，文件配置等系统上。(vhdl state machine design, simple, detailed and easy to understand, you can use the traffic light system file configuration file.)

VHDL库，仿真时使用的，包括打印，类型转换等实用的操作(Practical operation VHDL library, using simulation, including print, type conversion, etc.)

数字密码锁的vhdl实现，包括设置密码，修改密码，报警。

以上是VHDL硬件描述语言写的一个简单锝路流水灯程序,希望对刚接触VHDL的朋友有一定帮助-These are the VHDL hardware description language written in a simple flow path lights technetium procedures,刚接触VHDL want to have some friends to help

说明：  ZEDBOARD的管脚分配图和约束文件，包括PCB图和xdc文件(Pin assignment of ZEDBOARD)

matlab code for communication

一种合并频率的方法对时频分析及其有用所以才上传(a fast combination)

基于FPGA的数字低通滤波器 。。。。。(FPGA-based digital low-pass filter。。。。。)

Xilinx FPGA 时序约束资料，原厂出品，经典不需要理由(Xilinx FPGA timing constraint information, original, classic no reason)

C语言写得FIR滤波器代码，简单实用，是学习滤波器设计的好材料，附带PPT滤波器设计说明(C language written FIR filter code, simple and practical, is a good learning materials of filter design, with PPT filter design )