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VHDL实现ALU的源代码,并且提供了一个详细的testbench!
VHDL实现ALU的源代码,并且提供了一个详细的testbench!-ALU VHDL source code, and provide a detailed testbench!
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- 积分:1
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Verilog很不错的进阶书!看完后对数字模拟集成电路设计有个深入的认识!...
Verilog很不错的进阶书!看完后对数字模拟集成电路设计有个深入的认识!-This book is very important for a designer who wants to design a great digital circuits!
- 2022-03-15 20:34:36下载
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EDA
EDA技术及其应用《序列信号发生器的设计》,包括源文件。(EDA technology and its applications " sequence signal generator design, including source files.)
- 2012-10-29 18:30:40下载
- 积分:1
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FPGA_GFP
基于FPGA的GFP(通用成帧协议)封装数据成帧的实现。(FPGA-based GFP (Generic Framing Protocol) encapsulated data Framing realized.)
- 2007-07-20 15:07:59下载
- 积分:1
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uart01
一种实现计算机接口rs232与FPGA通信的基于VHDL语言设计的一段非常简洁的程序(A RS232 computer interface implementation with FPGA-based VHDL language communications designed a very simple procedure)
- 2009-03-15 23:13:42下载
- 积分:1
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《Verilog HDL 程序设计教程》3
《Verilog HDL 程序设计教程》3-"Verilog HDL Design Guide" 3
- 2023-02-08 02:25:03下载
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UML_2_Pour_les_bases_de_donnees
UML2 apprendre a modeliser a l aide de UML
- 2014-02-25 01:32:23下载
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Frame-synchronization
FPGA 帧同步源代码 调试无错误 ALTERA 平台(Frame synchronization
FPGA)
- 2011-06-21 10:41:22下载
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Advanced-FPGA-Design
Advanced FPGA Design - Architecture, Implementation, and Optimization(Advanced FPGA Design- Architecture, Implementation, and Optimization)
- 2015-04-13 16:00:33下载
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本例是一个6层电梯的控制系统,VHDL原程序,状态机,控制器
本例是一个6层电梯的控制系统,VHDL原程序,状态机,控制器-This case is a 6-storey elevator control system, VHDL original procedures, state machine, controller
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- 积分:1