pex8311代码实现

ULPI UTMI conversion

在利用FPGA的并行处理能力应对高速数据和去做复杂的数据处理时，对一些较为复杂或者重复性工作模块多的情况下，算法资源就需要进行预评估。有效的资源预评估不仅可以在芯片选型上有益，还可以对程序有较详细的估计，在硬件不变的前提下能够选择更好的算法优化。本文着重在Harris算法在FPGA的实现以及在移植之前对其占用的FPGA资源进行预评估。(Response to high-speed data and do complex data processing in the FPGA parallel processing capabilities, to cope with some of the more complex or repetitive tasks module，it is necessary to pre-assessment algorithm resources. Resources pre-assessment can not only be useful in the chip selection, but also be a more detailed estimate of the program to be able to choose a better algorithm optimization in the same premise hardware. This article focuses on the pre-assessment in the Harris algorithm in the FPGA implementation and its FPGA resources occupied prior to transplantation.)

16点FFT，简单易理解，适合初学者了解(16 point FFT, simple and easy to understand, suitable for beginners to understand)

四间隔频率变化，并循环输出50~51ms之间的频率。(Four-interval frequency changes and the cycle between 50 ~ 51ms output frequency.)

用ALTERA的FPGA实现UDP通信源代码(FPGA UDP)

HDL example source code 1/5 dff_as

使用VHDL汽车自动化技术VHDL代码1.镜旋转2.温度控制近期许多应用程序并通过VHDL它将会更容易

可以实现DDC各个模块的功能，如内插、抽取、FIR滤波等功能(DDC can realize the function of each module, such as interpolation, extraction, FIR filtering)

多个VHDL编码的例题，详细的电路图介绍，还有流程图-many examples of VHDL code, the particular introduction of circuit diagram and flow chart

Spartan-3E板卡XC2C64A CPLD 的代码(the XC2C64A CPLD on the Spartan-3E Starter Kit boards)