用VHDL写的运动计时表程序，用Modelsim仿真已经通过，帖出来与大家分享。...

24秒倒计时系统（有跑马灯） 利用CPLD-24 seconds remaining systems (5,250) using CPLD

VHDL实现ALU的源代码，并且提供了一个详细的testbench！-ALU VHDL source code, and provide a detailed testbench!

its the vhdl stuff for ddr sdram controller nice one easily understandable

外部ADC采集数据，存为数组文件。通过程序读入，然后即可求出ADC的SNR、SINAD、THD、ENOB等。(External ADC data collection, stored as an array of documents. Read through the program, then the ADC SNR, SINAD, THD, ENOB can be calculated.)

交通灯控制器的VHDL设计,能控制十字路口的红绿灯转换,通过目标芯片EPF10KLC84-4验证-Traffic lights controller VHDL design, can be controlled by traffic lights at the crossroads of the conversion, through the target chips EPF10KLC84-4 verification

camping checklist for outback campers. A must for deep forest hikers.

基于FPGA的32阶FIR数字滤波器设计 源程序。设计使用了并行乘法器，运行速度更快，占用内存更小，延迟更小。 (32 order FIR digital filter based on FPGA design source program. Design USES parallel multiplier, faster and less memory, less delay.)

spi接口的eeprom模型，型号为st公司m65pxx(The eeprom model of spi interface is st company m65pxx)

EP2C5T144 驱动 LCD1602液晶(LCD1602 LCD driver EP2C5T144)

800 x 480 / inch lcd