用VHDL写的运动计时表程序，用Modelsim仿真已经通过，帖出来与大家分享。...

四线电阻式触摸屏，ads7846控制显示触摸坐标(Four-wire Resistive Touch Panel, ads7846 touch control display coordinates)

本文为verilog的源代码-In this paper, the source code for Verilog

LDPC码的短循环对LDPC码性能的影响 (Short Protograph-Based LDPC Codes)

一个4*4矩阵键盘的VERILOG接口程序设计（FPGA）-A 4* 4 matrix keyboard interface program Verilog Design (FPGA)

在FPGA上实现声卡接口，电子琴，滤波比较器，最终实现语音通信 -In the FPGA to achieve the sound card interface, flower, filter comparators, the eventual realization of voice communications

verilog code for apb to ahb convert

对于中断技术有非常详细的讲解，带图片完整版(Technology for the interruption of a very detailed explanation, with pictures full version)

分别用分频比交错法及累加器分频法完成非整数分频器设计。-Points were staggered method and frequency than the frequency accumulator law to complete the design of non-integer divider.

ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.

程序是完整的一个数字下变频器的一个Verilog程序，经测试可以使用，欢迎下载(Program is a complete Verilog program a digital down converter, tested can be used, please download)