Traffic lights controller VHDL design, can be controlled by traffic lights at th...

fpga控制led灯的闪烁，内容简单，希望对初学者有用.(fpga control led lights flashing, the content is simple, I hope useful. . .)

说明：  DDS的基本原理主要由五部分组成，分别是；相位累加器，正弦波形存储器，数模转换器，低通滤波器和时钟，将相位累加器输出的数据作为地址，用来查询表的数据，将取出的正弦数据通过数模转换器输出模拟信号，模拟信号再通过一个低通滤波器输出纯净的正弦波信号。(The basic principle of DDS is mainly composed of five parts: phase accumulator, sinusoidal waveform memory, digital to analog converter, low-pass filter and clock. The output data of phase accumulator is used as address to query the data of table. The extracted sinusoidal data is output analog signal through digital analog converter, and the analog signal is output pure sine through a low-pass filter Wave signal.)

正弦波在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-sine wave in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim

该源码表述了ecc算法如何用vhdl实现RSA（Ron Rivest，Adi Shamir，Len Adleman三位天才的名字）一样，ECC（Elliptic Curves Cryptography，椭圆曲线密码编码学）也属于公开密钥算

圖形介面乘法器,也可自行使用verilog去改(Graphical interface multiplier, also free to use verilog go and change)

VHDL code for 32 byte RAM

this file is vhdl code of alu

用于modelsim仿真的xilinxfpga平台IP库，以ise 13.x为基础制作，在modelsim10下验证通过。(xilinx IP core library for modelsim simulate, based on ise 13.x, verified in modelsim10.)

OFDM系统中的相位跟踪模块（Phase_Tracking）的FPGA实现-Phase_Tracking in OFDM sysytems

脉冲多普勒雷达回波信号相干积累的VHDL源程序(pulse Doppler radar echo signal coherent accumulation of VHDL source)