关于两种实现pwm的方法 基于51单片机设计

FPGA-CPLD实习计数器7段数码管控制接口设计与LED显示控制，FPGA译码(FPGA-CPLD internship counter 7-segment LED control interface design and LED display control, FPGA decoder)

I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices.

一个用VerilogHDL语言编写的模6的二进制计数器-a Verilog HDL language used in the preparation of the six-binary counter

vhdl子程序，本人收集的，比较常用的代码-VHDL subprogram, I collected to compare commonly used code

combinational circuits code in vhdl

TIMING LEARNING -TIMING LEARNING

空间矢量调制脉冲的产生。 感应电动机的 VHDL 代码

实现了一个四层单电梯控制系统。门可以自动开关，也可以手动开关。代码可以集成，不超过驱动的现象。

MATLAB to HDL Code conversion

ISE时序约束笔记——Global Timing Constraints，这个文档中详细介绍了如何使用ISE中约束工具和原理，对fpga水平提高有很大帮助(In this file , global timing constraints is introduced very clearly. It can really helps)