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Tutorial.tar
zedboard partial reconfiguration tutorial
- 2015-04-08 01:32:35下载
- 积分:1
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2018全国大学生FPGA大赛封闭测试上机题
说明: 2018全国大学生FPGA创新设计大赛南京总决赛封闭测试题目,以及自己编写的verilog和testbench,欢迎学习借鉴(The closed test topic of the 2018 National Undergraduate FPGA innovation design competition Nanjing finals, as well as Verilog and testbench compiled by ourselves, are welcome to learn)
- 2020-11-23 22:39:33下载
- 积分:1
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基于FPGA五子棋显示verilog源代码
基于FPGA的verilog语言描述五子棋游戏中的棋框显示,应用VGA显示原理,用不同的颜色显示边框。以及根据棋子输入的要求,显示相应的棋子,不同的颜色显示不同的棋框和棋子
- 2022-12-19 10:35:03下载
- 积分:1
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lisa-vhdl2va
通过modelsim仿真检测matlab生成滤波器效果。(Generate the filter through matlab and simulated by modelsim.)
- 2013-12-12 11:17:18下载
- 积分:1
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clock_6
说明: ds1302时钟驱动程序,已在quartus上验证可以是直接使用(DS1302 clock driver, which has been verified on quartus, can be used directly)
- 2020-06-24 12:00:02下载
- 积分:1
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IIC EDID码配置
该代码完成了利用IIC总线接口,对HDMI芯片的EDID码进行配置的功能,已经验证在XILINX ML605开发板可用。
- 2022-02-01 20:27:01下载
- 积分:1
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CICFilter
文章运用分级抽取和多相滤波的方法改进传统CIC滤波器的结构,降低了系统工作频率,运用幅度改进函数(ACF)和外加级联余弦预滤波器的技术改进了滤波器频率响应,提出了一种高效的算法结构,改善了通带损耗,增大了阻带衰减,对CIC滤波器的实际应用和深入研究有着现实意义。
(Article the use of hierarchical multi-phase extraction and filtering methods to improve the structure of the traditional CIC filter, reducing the system operating frequency, the use of margin to improve the function (ACF) and the cosine cascade plus pre-filter technology to improve the filter frequency response, the an efficient algorithm to improve the pass-band loss, increases the stopband attenuation of the CIC filter in practical applications and in-depth study has practical significance.)
- 2020-08-14 11:08:27下载
- 积分:1
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BT1120转GTX详细设计方案
bt1120设计方案,描述了具体的方案设计以及整体的架构设计(Bt1120 design scheme, describes the specific scheme design and the overall architectural design)
- 2020-06-25 05:40:02下载
- 积分:1
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29335-素材(代码)
说明: 基于fpga的数字图像处理原理及应用源码(The principle and source code of digital image processing based on FPGA)
- 2020-07-02 05:00:02下载
- 积分:1
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keyboard
用FPGA单片机软核实现键盘扫描,键盘为4X4矩阵键盘,输入相应键值,用数码管显示-keyboard
- 2022-05-20 15:47:09下载
- 积分:1