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binary LDPC DECODER
二进制LDPC解码器:
- 2022-05-31 06:59:45下载
- 积分:1
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AD9226
FPGA控制AG9226进行采样的代码,并用signaltap测试了一下其正确性(FPGA control AG9226 to sample the code, and use signaltap to test the correctness of the demo.)
- 2020-12-19 17:19:09下载
- 积分:1
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ad9288
使用FPGA控制AD9288,方便移植,可以拿来直接使用,适合新手学习(Use FPGA control AD9288, easy migration, can be used to directly use for novices to learn)
- 2021-04-21 08:58:49下载
- 积分:1
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基于VHDL开发的自动售货机系统,可实现自动售货过程中的基本功能,具有一定的代表性。...
基于VHDL开发的自动售货机系统,可实现自动售货过程中的基本功能,具有一定的代表性。-VHDL-based development of a vending machine system which can automatically process the basic functions of sales, with a certain representativeness.
- 2022-03-24 04:11:41下载
- 积分:1
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shift_regeister
用blockram实现移位寄存器,开发语言为verilog hdl(Shift register with blockram achieve the development language for the verilog hdl)
- 2020-08-13 22:18:29下载
- 积分:1
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bayer_3RGB_interpolation
一个基于FPGA用verilogHDL设计的bayer格式转RGB格式的模块,本人设计(a code used for bayer_3RGB_interpolation ,which based on FPGA by verilogHDL)
- 2011-12-25 21:58:05下载
- 积分:1
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Common examples of VHDL, suitable for beginners, there are examples of commonly...
VHDL常用实例,适合初学者,有计时器等常用例子-Common examples of VHDL, suitable for beginners, there are examples of commonly used timer, etc.
- 2023-07-12 06:25:03下载
- 积分:1
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LCD
LCD Interface_Xilinx.CPLD源码参考设计(LCD Interface Xilinx CPLD)
- 2009-05-03 10:34:47下载
- 积分:1
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vhdl,无进位同步计数器,完成6进制加,输出6进制序列数
vhdl,无进位同步计数器,完成6进制加,输出6进制序列数-vhdl, non-binary synchronous counter to complete the six binary Canada, output 6, the number of binary sequences
- 2022-09-12 08:25:03下载
- 积分:1
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fpgaaverilogamaxamin
verilog 编写的比较最大值最小值得的程序,而且能够求出最大最小值在ram中存储的位置,测试通过下载即用(Comparison of the maximum write verilog smallest worthwhile program, and minimum and maximum values can be obtained is stored in ram position, the test that is used by downloading)
- 2013-06-06 15:44:48下载
- 积分:1