-
vhdl
说明: 学习VHDL可以用得上,有很多实例,可以对照着自己写一些东西(VHDL can be useful to learn, there are many examples, can be done to write something)
- 2008-10-31 20:59:04下载
- 积分:1
-
WorkSpace
计算三平动并联机构工作空间,自己编的,测试可以用(Calculation of three translation parallel mechanism)
- 2021-04-17 18:08:52下载
- 积分:1
-
multi16
有符号16位乘法器。经典booth编码。拓扑结构为wallance树。加法器类型是进位选择加法器。(Number system: 2 s complement
Multiplicand length: 16
Multiplier length: 16
Partial product generation: PPG with Radix-4 modified Booth recoding
Partial product accumulation: Wallace tree
Final stage addition: Carry select adder
)
- 2013-01-01 14:13:58下载
- 积分:1
-
FPGA实现12路pwm
采用vhdl语言实现12路的pwm波控制。-Language implementation using vhdl wave pwm control of the road 12.
- 2022-04-28 14:34:54下载
- 积分:1
-
add4bit
一位全加器的VHDL源码与TEST BENCH.XILINX下通过(A full adder and the VHDL source code through TEST BENCH.XILINX)
- 2009-07-20 08:18:37下载
- 积分:1
-
verilog实现的1024位的大数模逆算法,引入RAM作为数据通道
verilog实现的1024位的大数模逆算法,引入RAM作为数据通道-verilog to achieve the 1024 Modular inverse algorithms, the introduction of RAM as a data channel
- 2022-12-18 20:35:03下载
- 积分:1
-
vga编程。实现3种模式的vga控制,分别产生横彩条,竖彩条,棋格彩条的显示...
vga编程。实现3种模式的vga控制,分别产生横彩条,竖彩条,棋格彩条的显示-vga programming. Realization of the three-mode vga control, generate horizontal color of the color of the shaft, and the chess grid color of the show
- 2023-04-18 23:15:03下载
- 积分:1
-
ALTERA NIOS处理器实验,编程环境是QUARTUS,在NIOS SHELL下编译实现功能。实验USB接口...
ALTERA NIOS处理器实验,编程环境是QUARTUS,在NIOS SHELL下编译实现功能。实验USB接口-Altera NIOS processor experiments, programming environment is QUARTUS in NIOS SHELL compiler functionality. Experimental USB interface
- 2022-05-25 15:09:52下载
- 积分:1
-
ModelSim_
FPGA编写环境,具有仿真容易,软件内存小的特点(FPGA authoring environment, with easy simulation software features small memory)
- 2013-07-24 19:20:57下载
- 积分:1
-
uart16550 ip core UART VHDL source code
uart16550 ip core 通用异步收发器vhdl源代码-uart16550 ip core UART VHDL source code
- 2022-07-11 01:23:07下载
- 积分:1