可配置CRC参考设计 xilinx提供的VHDL

UC1608 24064驱动 COG LCD驱动程序(UC1608 24064)

自己做的一个关于more状态机的三种描述的比较。以后会有更多的资料，请大家关注。-doing more of a state machine on the three described earlier. Many more information, please everyone"s attention.

接口键盘和液晶屏上AT89S52代码

上海交通大学电子信息与电气工程学院VHDL经典教程-Shanghai Jiaotong University Electronic Information and Electrical Engineering, Institute of Classical VHDL Tutorial

用FPGA实现数字锁相环，开发环境为ISE(Using FPGA digital phase-locked loop, development environment for ISE)

由VHDL 语言实现的D触发器利用的是QUARTUES环境已经得到验证-By the VHDL language using the D flip-flop is QUARTUES environment has been tested

vivado lwip 应用文档 基于zynq 7020(vivado lwip example text of zynq)

ALTERA Cyclone1C20 Nios开发板，protel99格式-ALTERA Cyclone1C20 Nios，protel99

基于FPGA的正弦脉宽调制波vhdl代码，同时输出正弦波与SPWM(Sine pulse width modulation wave VHDL code based on FPGA, at the same time with SPWM output sine wave)

我用VHDL写的正弦，用FPGA内部ROM，有仿真testbench,在quartus里可以运行。在板子里已经验证-I used to write VHDL sinusoidal, using FPGA internal ROM, has simulation testbench, you can run in Quartus. Yard has already been verified in the plates