语音采集,直接在QUARTUSII中打开调试.

VHDL 基于cpld EPM570的DA转换代码(VHDL CPLD EPM570 the DA conversion code based on)

eDP接口TFT-LCD显示驱动原码（verilog+c）(eDP Interface TFT-LCD display driver source code (verilog+c))

FPGA程序,使用Verilog语言生成1个脉冲可调的PPS脉冲信号。(FPGA program generates 1 PPS pulse signal, using Verilog language.)

基于MAX2运用Quartus实现串口通信-MAX2-based use of Quartus Serial Communication

quartus ii 环境下，一个完整的利用TEXTIO仿真的源代码，包括读数据文件和输出数据到文件。(Under quartus ii environment, a complete simulation using TEXTIO source code, including reading data files and output data to a file.)

CycloneIV控制采样芯片AD9248-20MHz，VHDL语言(CycloneIV control sampling chip AD9248-20MHz, VHDL language)

verilog coding for butterworth filter with cut off frequency with 500hz

印制线路板设计经验点滴-Printed Circuit Board Design Experience

ofdm的verilog程序 利用ＦＰＧＡ实现-OFDM FPGA using the Verilog procedures realize

combinational circuits code in vhdl