以前在学校里的课程设计，使用verilog编写的一个CPU程序，可以下板子...

Lift Controller in vhdl using process statement and state disgram

xilinx spartan6的pcie pio源代码(xilinx spartan6 pcie pio demo)

FPGA应用举例，非常适合初学者，高手莫下-FPGA application, for example, very suitable for beginners, experts, under Mo

uart16550 ip core 通用异步收发器vhdl源代码-uart16550 ip core UART VHDL source code

1、掌握WALSH码产生的原理和WALSH码的特性。 2、掌握WALSH码的产生和特性分析的软件仿真。 3、掌握WALSH码的硬件产生方法。 (1, master code WALSH WALSH code generation principles and characteristics. 2, master WALSH code generation and characterization of the software simulation. 3, master code WALSH hardware generation approach.)

运用VHDL语言编写的交通灯实现程序,能模拟十字路口的交通灯控制(VHDL language using traffic lights to achieve program can simulate the traffic light controlled crossroads)

io 组件，用vhdl实现io端口的控制，包括输入输出，握手信号，-io port VHDL code

用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行-Written using Verilog 4* 4 keypad keys detection procedures. The project has been compiled. Directly in the development of Atera DE1 Fpga board run

基于verilog的cpri接口代码，支持各种速率自由切换，量产产品实际应用代码(Cpri interface based on verilog code, support various rate free switch, production products the actual application code)

CAN驱动器MCP2515驱动，verilog编写，实测可用(CAN driver MCP2515 driver, Verilog written, measured available)