以前在学校里的课程设计，使用verilog编写的一个CPU程序，可以下板子...

利用quartus II 软件采用verilog语言设计了一个sigmoid激活函数(this work is a sigmoid ,use verilog language)

verilog 编写的ldpc编码，含有两个文件(LDPC written by Verilog)

步进电机驱动，32等级速度，带加减速度控制。verilog编写。(step motor driver,32 level speed.)

入门，verilog语言，实现字符型液晶1602的显示，及按键控制-verilog

一种半加器的算法，是基于VHDL软件仿真。请大家下载参考！-A full-adder algorithm is based on the VHDL software emulation. Please download the reference!

fpga上实现的51内核，带有LCD试验，顺利试验成功很好用。(on fpga implementation of 51 core with LCD test, successfully tested well with the smooth.)

Demo program for use UART STM8S

ALTERA上DE2平台，利用内部50M Hz时钟，在数码管模拟显示时间(时分秒)。-ALTERA on DE2 platform, using internal 50M Hz clock, in the digital control simulation show time (hours minutes and seconds).

频率计，vhdl语言， ispDesignEXPERT-Frequency meter, vhdl language, ispDesignEXPERT

VHDL参考例程--日如DAC0832接口电路程序-VHDL reference routines- on procedures such as the DAC0832 Interface Circuit