以前在学校里的课程设计，使用verilog编写的一个CPU程序，可以下板子...

tle转换为六根数的c++源代码，英文原版代码，测试可用(tle converted to six the number of c++ source code, the English original code, test available)

用verilog实现对三个16位数进行相加乘法器(Three 16-digit sum of the multiplier Verilog)

RFID防碰撞算法的研究，以及对其各种算法的仿真，以及改进算法的仿真和比较。(RFID anti-collision algorithm, as well as its simulation algorithms, and improved simulation and comparison algorithms.)

使用VHDL进行分频器设计，主要是一些分频的东西，整数分频，小数分频，奇次分频和偶次分频-Divider using VHDL to design, mainly because some sub-band stuff, integer divider, fractional-N, odd and even sub-sub-sub-sub-band frequency

vmm log 验证平台，采用vmm搭建 (vmm log verification platform, built by vmm)

说明：  使用verilog实现的双电梯控制器，1-9层，仿真通过(a bi-elevator controller written in VerilgHDL, which has floor1-9, simulation passed)

用VHDL编写简单的直流电机控制方法.供大家参考.-use VHDL to prepare a simple DC motor control methods. For your reference.

TMS320C6678 EVM TMS320C6678 EVM GOOD(TMS320C6678 EVM GOOD TMS320C6678 EVM GOOD)

A ROM to build a squaring circuit

龙芯CPU+IP+资源简介，希望大家能够了解自己开发的芯片。(Godson CPU+ IP+ Resource profile, hope that we can understand their own chips.)