以前在学校里的课程设计，使用verilog编写的一个CPU程序，可以下板子...

SPI读写AD9361，通过串口回读关键寄存器读写是否正确。(SPI reads and writes AD9361, reads and writes the key registers correctly through the serial port.)

一个用FPGA语言设计数字秒表的程序，有相关的源程序和说明-FPGA design using a digital stopwatch language of the procedures and instructions related to the source

Verilog 实验代码。。。经典的，里面都是完整的项目文件。 ISE环境。(Verilog test code. . . Classic, which is a complete project file. ISE environment.)

还好用，大家一起来看下，不错的图书管理软件啊 ，呵呵(Fortunately with, everyone look, the good library management software, ah, huh, huh)

VGA显示程序VHDL版本，适用于ALTERA的CPLD(VGA display program applies ALTERA CPLD)

adding custom ip EDK

利用verilog驱动LCD1602 本实验是用LCD1602显示英文。（LCD带字库）(//Use verilog driver LCD1602// video tutorial for all of us 21EDA e-learning board// The experiment is LCD1602 display in English. (LCD with font))

说明：  该程序包是SD卡/MMC卡控制器SDC的verilog语言包，它包括以下4部分：RTL源代码，测试平台，软件仿真文件，说明文件。(This source package is the SD card and MMC card controler model based on the Verilog language. It has the following 4 parts: RTL language, testbench, software simulating files and help document.)

基于cycloneIIFPGA芯片Ep2c5t144c8的解调程序，用VHDL语言生成-CycloneIIFPGA chip-based demodulation Ep2c5t144c8 procedures, using VHDL language generation

说明：  VHDL BASED DATA COMPRESSION