以前在学校里的课程设计，使用verilog编写的一个CPU程序，可以下板子...

DDR2 SDRAM仿真模型，适合于ModelSim下工作，请先阅读readme(DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.)

DDR SDRAM的资料，有兴趣的朋友可以下下来-DDR SDRAM information, interested to see friends down under

成为真正的网页制作的高手的话,必须了解并使用DHTML.这里提供了最好的手册和文档.-become truly a master pages, then have to understand and use DHTML. Here to provide the best manuals and documents.

一个简单的千兆以太网UDP协议的实现,可以实现数据的收发和ARP，实现PC端与FPGA的以太网通信(A simple implementation of Gigabit Ethernet UDP protocol can realize data sending and receiving and ARP, and realize Ethernet communication between PC and FPGA.)

时间设置 可以作为设计中的一个小模块进行使用 方便快捷(time setting)

基于Verilog的PCI总线接口的设计及应用-Verilog-based PCI-bus interface design and application.

verilog例子，有130多个，值得参考，新手很有帮助-Verilog example, there are more than 130, it is also useful, very helpful to novice

vhdl测试程序，用于初雪者熟悉hdl的具体语法应用。比较简单了。(VHDL test procedure for the First Snow hdl who are familiar with the application of specific syntax. A relatively simple.)

外部ADC采集数据，存为数组文件。通过程序读入，然后即可求出ADC的SNR、SINAD、THD、ENOB等。(External ADC data collection, stored as an array of documents. Read through the program, then the ADC SNR, SINAD, THD, ENOB can be calculated.)

fpga串口的发送程序基于verilog语言拿走不用谢。(The sending program of FPGA serial port is based on Verilog language.)