大头照抽奖系统+3D展示墙

用HMM进行语音识别代码，说话人识别系统,界面友好，可以对实时录音的说话人进行识别

1、支持安装扩展名为appx、appxbundle离线安装包，支持安装lic许可证。2、支持部署到所有用户，包括新建的用户（首次登录的用户帐户部分软件需要注销后重新登录才会安装）。3、支持开发者许可证的获取查询和删除。4、已设置应用包卸载功能不影响当前登录用户已安装的商店应用。5、支持windows 8(最多只能部署25款软件，只能安装appx包）/8.1（没有听到部署限制的消息，经测试至少能部署30款以上！）如果是封装到映像中最多只能设置24个应用程序。支持脱机系统映像中的应用程序的部署和卸载。6、支持64位系统商店应用的安装和卸载。7、支持关联文件，双击安装到当前用户。8

《数字信号处理理论、算法与实现》是2003年清华大学出版社出版的图书，作者是胡广书。绪论O.1数字信号处理的理论O.2数字信号处理的实现0.3数字信号处理的应用O.4关于数字信号处理的学习参考文献上篇经典数字信号处理第1章离散时间信号与离散时间系统1.1离散时间信号的基本概念1.1.1离散信号概述1.1.2典型离散信号1.1.3离散信号的运算1.1.4关于离散正弦信号的周期1.2信号的分类1.3噪声1.4信号空间的基本概念1.5离散时间系统的基本概念1.6LSI系统的输入输出关系1.7LSI系统的频率响应1.8确定性信号的相关函数1.8.1相关函数的定义

实测可用，精度不错；改编自正点原子F4版；

基于FPGA的fir滤波器程序，verilog代码

The Verilog® Hardware Description Language (Verilog HDL) became an IEEE standard in 1995 as IEEEStd 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstraction in astandard textual format for a variety of design tools, including verification simulation, timiThe clear directive from the users for these three task forces was to start by solving some of the followingproblemsConsolidate existing IeeE Std 1364-1995Verilog generate statementMulti-dimensional arraysEnhanced Verilog file i/oRe-entrant tasksStandardize Verilog configurationsEnhance timing representationEnhance the vpi routinesAchievementsOver a period of four years the 1364 Verilog Standards Group(vsg) has produced five drafts of the lrmThe three task forces went through the EEe Std 1364-1995 lRM very thoroughly and in the process of consolidating the existing Lrm have been able to provide nearly three hundred clarifications and errata for theBehavioral, ASIC, and PLI sections. In addition, the vsg has also been able to agree on all the enhance-ments that were requested (including the ones stated above)Three new sections have been added. Clause 13, "Configuring the contents of a design, deals with configuration management and has been added to facilitate both the sharing of verilog designs between designersand/or design groups and the repeatability of the exact contents of a given simulation session Clause 15Timing checks, "has been broken out of Clause 17, "System tasks and functions, "and details more fullhow timing checks are used in specify blocks. Clause 16, "Backannotation using the Standard Delay Format(SDF), addresses using back annotation(IEEE Std 1497-1999)within IEEE Std 1364-2001Extreme care has been taken to enhance the vpi routines to handle all the enhancements in the behavioraland other areas of the lrm. minimum work has been done on the pli routines and most of the work hasbeen concentrated on the vpi routines. Some of the enhancements in the vpi are the save and restart simu-lation control, work area access, error handling, assign/deassign and support for array of instances, generateand file 1/0Work on this standard would not have been possible without funding from the cas society of the ieee andOpen verilog InternationalThe IEEE Std 1364-2001 Verilog standards Group organizationMany individuals from many different organizations participated directly or indirectly in the standardizationprocess. The main body of the Ieee Std 1364-2001 working group is located in the United States, with asubgroup in Japan (EIAJ/1364HDL)The members of the IEEE Std 1364-2001 working group had voting privileges and all motions had to beapproved by this group to be implemented the three task forces focused on their specific areas and theirrecommendations were eventually voted on by the Ieee Std 1364-2001 working group

本版本（含有C++,net,C#等）是免费部分开源并提供源代码，程序设计人员可以根据自己的需要进行二次开发进行获利。本套程序绝对不含黑客代码段以及损害它人利益的代码段，如有怀疑可重新编译源程序或反编译源程序自行查看。1.免费开源,使用者可以放心大胆的使用,控件源代码提供丰富的中文注释,可以使使用者看到内核原理.2.二次开发性强,控件提供很多属性,接口,以及事件,开发者可以根据自己的需要,任意改装,包括外观,3.更多资料登录www.anychat.cn了解。

蒙特卡罗方法与MATLAB仿真，数学建模常用的方法。

评价大气污染，运用matlab软件进行实现，采用ISC3模型

物联网COAP协议的CSharp实现，VS2010