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基于Matlab实现的指纹图像细节特征提取

于 2020-11-30 发布
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很实用的程序,详细介绍了如何实用软件识别指纹。几乎完全不懂得人也可用DO+ p1+p2+p3+p5+p6+4][5Qif(n==7|n==56(t)M ahbdpbt(y(j,x(i),’bo);6化正像细化处理图信c)特证液果for i=1:t-15d= sqrt((x(i)-x(D)2+(y(i)-y(j)2);FV C2000100if d< %100typeI(1)=Qbreakb1(i=o1944-2011ChinaAcademicJournalElectronicPublishingHouse.Allrightsreservedhttp://www.cnki.net9436[2MATLAB 6.5 M.152003-3.LD I1/3,2002-513(5):946~956[5 Dario m ai m em ber Eee, and d av de m alon i d irect grayscalem inu tae detection in fingerpr ints J]. EEE tran sactions onpat te m analys s and m ach ine inte lligen ce 1997 19(1): 27-40M ahbMATLAB 6 5[M]2004-51/3(19815-),((1947-),([1] R Clarke Hum an ien tification in in fom at ion systen s M anagem ent ch allenges and pub le policy issues[ J. In fo T echnol People1994,7(4):6~37.(1978.1-),()113)[3 S Coleri M Ergen A Pu ri and A Bahai Channel E stim ationTechn iqu es Based on Pilot a range ent in OFDM System s[ JIL abV IEWwireEEE T ran sact in s on Broadcast ing Sep 2002 48( 3):223lessan-ofdm229[4 X Tang M a buini and a JGo Hsm ith E fect of Channel Est im artion E rror on M-QAM BER Perfm ance in Ray le igh Fad ing J IEEE T ran sactions On Commun ications Dec 1999, 47(121856LabV ieWieee 802 1 6d[5 P Das and D Koch On the U se ofV iu al Programm ng LanguagesO FDMfor Commun ication System Sim ulation[C IEEE Proceedings ofSoutheast Con, Apr 1991(BER)[6 M C Jeruch m, P B alb an and K s Shanmugan Simu lat ion oBERCommun ica tion Sy stems M odeling M ethodology and Techn iques[J. K hw er A cadem i 2000BER[7] V. Erceg L J ste in SY Tindra SR Parkoff A G up ta BKulic A a Julius and R B inchi An Em p irically Based Path LossIeee 802 16dOFDMM odel for W ire kss Ch annes in Suburban Environm ents[ J]. EEEJoumal on Selected A reas in C mmun ica tions Ju I 1999(197610-),[1] IKoffm an and v Rom an. Broadband W iess a ccess So hi tionsBased on O FDM A ccess in 802 16[ J IEEE Camm unicat ionsM agazne, A pr 2002(19659-),(),[21 EKlund R BM arks K L Stanwood and Sw ang IEEE Standard802. 16a a Techn ical very iew of thew ireless antm a ir In ter(19776-),(face for B roa dband W ire less access[ J]. IEEE Camm unicat ionsM agaz ne Jun200240(6):98-107185o1994-2011ChinaAcademicJournalElectronicPublishingHouse.Allrightsreservedhttp://www.cnki.net

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REV.3.0FiquresFIGURE -I: PCI LOCAL BUS APPLICATIONS春DFIGURE 1-2: PCI SYSTEM BLOCK DIAGRAM17FIGURE2-1: PCI PIN LIST.…………..…………21figure 3-1: ADDRESS PHASE FORMATS OF CONFIGURATION TRANSACTIONS...... 48Figure 3-2: LAYOUT OF CONFIG ADDRESS REGISTER, ..............................................50Figure 3-3: HOST BRIDGE TRANSLATION FOR TYPE O CONFIGURATION TRANSACTIONSADDRESS PHASE51FIGURE3-4: CONFIGURATION READ…………156FIGURE3-5: BASIC READ OPERATION………………………65FIGURE 3-6: BASIC WRITE OPERATION66FIGure 3-7: MASTER INITIATED TERMINATION........................ 68FIGURE3-8: MASTER- ABORT TERMINATION…………69Figure 3-9: RETRY. ..........................................................................................................73FiGure 3-10: DISCONNECT WITH DATA. ........................74FiGure 3-11: MASTER COMPLETION TERMINATION:·:····:··.·4····.···…75FiGURE 3-12: DISCONNECT-1 WITHOUT DATA TERMINATION·····76Figure 3-13: DISCONNECT-2 WITHOUT DATA TERMINATION76FiGure 3-14: TARGET-ABORT…177figure 3-15: BASIC ARBITRATIONFIGuRE 3-16: ARBITRATION FOR BACK-TO-BACK ACCESS…94FiGurE 3-17: DEVSEL# AsSERTION·····:···.·:··110Figure 3-1 8: IDSEL STEPPING114FiGure 3-19: INTERRUPT ACKNOWLEDGE CYCLE. ...................................................114FIGURE3-20: PARITY OPERATION………116FIGuRE 3-21: 64-BIT READ REQUEST WITH 64-BIT TRANSFER125FIGURE 3-22: 64-BIT WRITE REQUEST WITH 32-BIT TRANSFER..........126FIGURE 3-23 64-BIT DUAL ADDRESS READ CYCLE129FIGURE 4-1: ADD-IN CARD CONNECTORS...........................138FIGURE4-2:V/ICURⅤ ES FOR5 V SIGNALING.…………………143FIGURE 4-3: MAXIMUM AC WAVEFORMS FOR 5V SiGnaling145FIGURE 4-4: V/I CURVES FOR 3.3V SIGNALING148FIGURE4-5:MAⅹ IMUM AC WAⅤ EFORMS FOR3.3ⅴ SIGNALING………150FIGURE 4-6: CLOCK WAVEFORMS151FIGURE 4-7: OUTPUT TIMING MEASUREMENT CONDITIONS.··4·:······.·154FIGURE4-8: INPUT TIMING MEASUREMENT CONDITIONS…………154FIGURE 4-9: SUGGESTED PINOUT FOR POFP PCI COMPONENT···“···:.···.····:·········157FIGURE4-10: CLOCK SKEW DIAGRAM………158FIGURE 4-1: RESET TIMING16lFIGURE4-12: MEASUREMENT OF TPROP,3.3 VOLT SIGNALING……………166FIGURE 5-1: PCI RAW ADD-IN CARD(3.3V, 32-BIT).183FIGURE 5-2: PCI RAW VARIABLE HEIGHT SHORT ADD-IN CARD(3.3V, 32-BIT)..........184FIGURE 5-3: PCI RAW VARIABLE HEIGHT SHORT ADD-IN CARD(3.3V, 64-BIT)....185FIGURE 5-4: PCI RAW LOW PROFILE ADD-IN CARD(3.3V, 32-BIT)..........186PCI LOCAL BUS SPECIFICATION, REV.3.0FIGURE5-5: PCI ADD-Ⅰ N CARD EDGE CONNECTOR BEⅤEL……187FIGURE56: PCI ADD-IN CARD ASSEMBLY(3.3V)……………………………88FIGURE 5-7: LOW PROFILE PCI ADD-IN CARD ASSEMBLY 3.3V)189FIGURE 5-8: PCI STANDARD BRACKET………190FIGuRE 5-9: PCI LOW PROFILE BRACKET191FIGURE 5-10: PCI STANDARD RETAINER···192FIGURE5-11: IO WINDOW HEIGHT∴………………193FIGURE 5-12: ADD-IN CARD INSTALLATION WITH LARGE IO CONNECTOR.......194FIGURE 5-13: 32-BIT CONNECTOR196FIGURE 5-14: 3.3V/32-BIT CONNECTOR LAYOUT RECOMMENDATION. ........................197FIGURE5-15:3.3V/64-BIT CONNECTOR198FIGURE 5-16: 3.3V/64-BIT CONNECTOR LAYOUT RECOMMENDATION 199FIGURE 5-17: 3.3V/32-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES2(垂D·。垂,音着垂。着音D。。着。D音着音垂。音着音FIGURE 5-18: 3.3V/64-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES….201FIGURE5-19: UNIVERSAL 32-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES………………………………202FIGURE 5-20: UNIVERSAL 64-BIT ADD-IN CARD EDGE CONNECTOR DIMENSIONS ANDTOLERANCES203FIGURE5-21:PCⅠADD- IN CARD EDGE CONNECTOR CONTACTS……204FIGURE5-22: CONNECTOR CONTACT DETAIL………………205FIGURE 5-23: PCI CONNECTOR LOCATION ON SYSTEM BOARD208FIGURE5-24:32- BIT PCI RISER CONNECTOR……209FIGURE 5-25: 32-BIT/3.3V PCI RISER CONNECTOR FOOTPRINT210FIGURE 5-26: 64-BIT/3.3V PCI RISER CONNECTOR211FIGuRE5-27:64-BI/3.3ⅴ PCI RISER CONNECTOR FOOTPRINT∴………212FIGURE 6-1: TYPE OOH CONFIGURATION SPACE HEADER215FIGURE 6-2: COMMAND REGISTER LAYOUT217FIGURE6-3: STATUS REGISTER LAYOUT……………………………219FIGURE 6-4: BIST REGISTER LAYOUT222FIGURE 6-5: BASE ADDRESS REGISTER FOR MEMORY........... 225FIGURE 6-6: BASE ADDRESS REGISTER FOR L/O225鲁着D音看FIGURE 6-7: EXPANSION ROM BASE ADDRESS REGISTER LAYOUT.....,..... 228FIGURE6-8: EXAMPLE CAPABILITIES LIST…….231FIGURE6-9: MSI CAPABILITY STRUCTURES…..……233FIGURE 6-10: MSI-X CAPABILITY STRUCTURE238FIGurE 6-11: MSI-X TABLE STRUCTURE翻音。音239FIGurE 6-12: MSI-X PBA STRUCTURE…239FIGURE 7-1: 33 MHZ PCI VS 66 MHZ PCI TIMING······:··················257FIGURE7-2:3.3 V CLOCK WAVEFORM.…………259FIGURE 7-3: OUTPUT TIMING MEASUREMENT CONDITIONS263FIGURE -4: INPUT TIMING MEASUREMENT CONDITIONS263FIGURE75:TvAL(MAX) RISING EDGE…………264FIGURE 7-6: TVAL(MAX) FALLING EDGE·265FIGURE77:TVAL(MIN) AND SLEW RATE……26510
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