登录
首页 » Verilog » i2C verilong slave&master 代码分析

i2C verilong slave&master 代码分析

于 2023-09-05 发布 文件大小:8.89 kB
0 291
下载积分: 2 下载次数: 2

代码说明:

I2C verilong code  详细代码分析,根据协议每一步都有分析,进过验证,代码分slave和master部分,代码比较成熟

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • uart_tx_rx
    在altera的FPGA平台上实现rs232串口的自收发通信,速率为115200波特率,PC机使用串口调试助手即可观察结果。包含全部代码与工程,本人亲自测试通过。(Realization of self transmitting and receiving communication serial port of RS232 In altera on the FPGA platform, at a rate of 115200 baud rate, PC using serial debugging assistant can be observed. Contains all the code and engineering, I personally tested by. )
    2014-06-11 21:57:41下载
    积分:1
  • DE1 SOC D5M两相机
    应用背景两个摄像头,一个FPGA。相机都可以显示在VGA显示器采用开关[ 5 ]。关键技术ccd_capture V / V。i2c_ccd_config V / V。i2c_controller V / V。raw2rgb V / V。seg7_lut V / V。vga_controller V / V。
    2022-09-14 14:45:03下载
    积分:1
  • sv fifo 环境
    异步 fifo 证实使用系统 verilog.100 英寸 %功能覆盖率和代码覆盖率已经 provided.environment createddifferent 测试用例为了满足要求而编写的。
    2022-03-21 21:10:30下载
    积分:1
  • ASKMod
    ASK调制信号的verilog VHL设计,在ise中实现了ASK信号的调制解调。(ASK modulation signal verilog VHL design, in ise to achieve the ASK signal modulation and demodulation.)
    2017-04-17 10:46:19下载
    积分:1
  • DisplayPort Link training optimization
    说明:  介绍了Displayport规格中lind training的背景研究,设计和实现。(As the requirement for bandwidth continues to increase in the video market, retaining the signal integrity becomes increasingly more difficult. For many of todays commonly used video interfaces, there are devices that can be used to assist in this matter. However, the use of such a device is only partially documented in the DisplayPort specification for the receiving image device, which means that the receiving side of the video link is free to choose its own implementation. This report presents, together with background research and design decisions, a suggestion for such an implementation. This implementation would need to be compatible towards a wide range of possible video Source devices and DisplayPort cables.)
    2021-01-11 16:48:49下载
    积分:1
  • 基于VGA显示的10路逻辑分析仪
    FPGA 的VGA显示应用。最大采样频率100M,共十个采样通道,存储深度为每通道1024位。带时间标线,显示区域可移动。最终将波形数据显示到VGA显示器上。用Quartus ii进行设计,仿真工作。最后可在开发板上进行硬件测试。
    2023-04-08 01:00:04下载
    积分:1
  • I2C APB ds v1.0
    关于i2c master/slaver control 方面的技术资料 介绍其特色与使用方法(On the i2c master/slaver control of technical information on their characteristics and use)
    2007-07-29 00:40:04下载
    积分:1
  • VHDL
    A Full adder using half adder unit in vhdl
    2010-01-05 11:39:14下载
    积分:1
  • UART 变送器
    UART 变送器正以一个 8 位数据总线和 8 位地址总线。变送器 FIFO 是包含和发射机状态机包括国家: 闲着,开始的传输,传输停止的实际数据传输。UART 变送器可以连接到任何具有可配置的数据和地址总线的 UART 接收机。
    2022-08-13 16:53:10下载
    积分:1
  • ps2
    使用verliog实现ps2键盘接口的驱动,通过altera cyclone 第四代验证通过(Use verliog implement ps2 keyboard interface driven by a fourth-generation verified by altera cyclone)
    2015-12-17 16:28:38下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载