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北大verilog课件,数字集成电路设计入门,从HDL到版图
北大verilog课件,数字集成电路设计入门,从HDL到版图-North Verilog courseware, digital IC design entry, from HDL to the map
- 2022-07-24 16:14:44下载
- 积分:1
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vivek
THIS IS A SOURCE CODE FOR LIFT IN VHDL LANGUAGE
- 2012-04-08 02:01:07下载
- 积分:1
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sdram
SDRAM驱动器,自己项目利用的,已经经过实际验证(sdram controller)
- 2010-01-28 14:13:35下载
- 积分:1
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led
LED灯、跑马灯的显示源程序,包括对代码的说明(Display source code LED lights, marquees, including the code specification)
- 2013-01-18 18:20:57下载
- 积分:1
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HDB3
FPGA实验_HDB3编码器设计(包含5个模块)(FPGA design experiments _HDB3 encoder (including 5 modules))
- 2020-11-30 10:29:28下载
- 积分:1
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clock
数字系统设计报告,多功能电子钟,显示年月日星期时分秒,及校时等功能(Digital system design report, multi-functional electronic bell, show date when the minutes and seconds a week, and school functions when)
- 2009-01-02 16:36:29下载
- 积分:1
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20190718
说明: uart implementation and documentation, this describes the basic steps in building your own uart module on verilog and programming them on an fpga device
- 2020-06-21 21:40:01下载
- 积分:1
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组合下载器SCH-3-RENEW
有自己制作的下载器原理图,包含了stlinkv2,XDS100V3,USBBLASTER.原理图和封装,一款多功能下载器。(Have their own production downloader schematic diagram, contains stlinkv2, XDS100V3, USBBLASTER. Schematic diagram and encapsulation, a multi-function downloader.)
- 2019-02-28 17:27:16下载
- 积分:1
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FPGA development board to write the Verilog code: function is from the client co...
FPGA开发板上写的Verilog代码:
功能是从电脑端发送一个字节,然后把它接收回来。
-FPGA development board to write the Verilog code: function is from the client computer sends a byte, and then receive it back.
- 2022-03-17 03:39:34下载
- 积分:1
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使用Veriolog hdl 编写手机屏测试程序.
使用Veriolog hdl 编写手机屏测试程序.-Veriolog hdl prepared to use cell phone screen test.
- 2023-04-25 00:20:03下载
- 积分:1