-
CDCM6208_SPI
说明: 完成对cdcm6208的时钟芯片的配置,输出高频时钟(cdcm6208 cofigure using SPI interface)
- 2021-02-06 18:29:56下载
- 积分:1
-
pgaasm
is61lv25616简单的verilog程序,完成sram读写 主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动(1lv25616 simple verilog program, complete sram read and w1lv25616 simple verilog program, complete sram read)
- 2017-06-19 13:08:08下载
- 积分:1
-
project_zy
超声波测距程序 适用传感器HC-SR04(The application of sensor HC-SR04 for ultrasonic range finder)
- 2017-12-25 18:05:12下载
- 积分:1
-
TRY-1516-CSV0115--- SANGEETHA
说明: VHDL BASED DATA COMPRESSION
- 2019-01-01 16:37:53下载
- 积分:1
-
mul
实现有限域中乘法,输入二个普通二级制数,输出在本原多项式的乘法结果(Achieve limited multiplication field, enter the number of two-tier system of two ordinary output in primitive polynomial multiplication results)
- 2014-01-12 22:52:38下载
- 积分:1
-
full adder
说明: vhdl code for full adder
- 2020-06-30 22:46:55下载
- 积分:1
-
is61lv25616 (1)
verilog测试,fpga测试片外sramis61lv25616,256个k个字,16位,比较难调(it is fpga is 61lv25616 simple verilog program,complete sram read and write.it can read and write .)
- 2020-12-09 15:39:18下载
- 积分:1
-
电梯的vhdl设计,6层楼含开关门,警报,内部请求,外部请求
电梯的vhdl设计,6层楼含开关门,警报,内部请求,外部请求-Vhdl elevator design, six floors with switch doors, alarm, internal requests and external requests
- 2022-06-27 17:04:01下载
- 积分:1
-
verilog源码,可实现两位的加法器,在xillinx foundation 3.1下验证通过...
verilog源码,可实现两位的加法器,在xillinx foundation 3.1下验证通过-verilog source, the two can achieve Adder, In xillinx foundation 3.1 certification through
- 2022-10-11 18:55:03下载
- 积分:1
-
Use Quartus in LCM display static graphics palace
运用Quartus在LCM中显示静态宫殿图形-Use Quartus in LCM display static graphics palace
- 2023-04-14 02:55:03下载
- 积分:1