LCD1602 verilog

fpga usb接口系统设计实例,实现了usb通讯，控制相关器件完成高速数据采集，存储，数据处理。-fpga usb interface system design example, the realization of the usb communications, control-related devices to complete high-speed data acquisition, storage, data processing.

关于usb调试相关测试 代码，用于测试和适配等(usb coding for testing , verigy, for studing usb and fpga)

说明：  在quartus下搭建的数字锁相环，能实现频率自动跟踪。(The digital phase-locked loop built under quartus can realize automatic frequency tracking.)

FPGA中常用的上升沿检测和下降沿检测代码以及检测是否有边沿，使用的verilog hdl语言，有几个写法，附带仿真时序，可以下载学习一下

通过数码管和单片机的组合 制作成的数码管时钟程序(Through the combination of digital control and made ​ ​ into a single-chip digital clock program)

PCIE仿真设计教程1-6，我帮大家收集到一起了(PCIE simulation design tutorial 1-6, I help you gather together.)

此是进行循环冗余效验的Verilog编码，适合多种标准，如CRC16(this Cyclic Redundancy is well-tested Verilog code for a variety of criteria, such as CYXLIC REDUNDANCY)

可选择饮料类型的基于FPGA的自动售货机

this is a vhdl program...

code for fft non synthesisable in xilinx ise