8位深，9位宽FIFO VHDL源码设计，如需改进可在此基础上扩展

说明：  FPGA Verilog控制FLASH片外读写(Verilog Controls FLASH Out-of-Chip Read-Write)

本程序调试了TI的高精度模数转换芯片ADS1115,此模数转换器采用双积分型，16位，为IIC通信方式，调试较复杂，在对直流采集方面有着广泛的应用(This program debugging TI s high-precision analog-digital conversion chip ADS1115)

verilog例子资源，对于初学者很有帮助。-verilog examples of resources are very useful for beginners.

MATLAB辅助设计数字滤波器源代码，QUATUS II 实现！(MATLAB-aided design of digital filter source code, QUATUS II implementation!)

利用vhdl编写的双端口Ram程序，不带数据纠错处理-VHDL prepared to use dual-port Ram procedures, do not deal with data error correction

实现矩阵相乘，即点积运算，为VERILOG语言。可以根据自己的需要改变维数，采用了流水线的结构(Achieve matrix multiplication, ie dot product operations, for VERILOG language. You can change the dimension according to their needs, using a pipeline structure)

Everspin SPI MRAM chipset(MR25H10,MR25H40,MR25H256)

moore 状态机的一个简单的事例，初学者很好的地实例！-moore state machine of a simple example for beginners to very good example!

工具；

片上网络NOC基于fpga实现的，routing模块。(NOC-chip networks realized fpga-based, routing module.)