VHDL language learning paradigm, the FSK

说明：  使用verilog语言实现H.265压缩算法，能够实现实时视频数据的压缩传输(Using Verilog language to realize h.265 compression algorithm can realize the compression and transmission of real-time video data)

串口收发程序，成功通过仿真，可以用来学习(Serial transceiver,It is successful through simulation and can be used to learn)

FFT处理器设计及其应用研究，适合做fpga信号处理的技术人员参考-FFT processor design and applied research, suitable for signal processing fpga technology reference

A/D采集的数据缓存进入fifo，并通过读信号将FIFO中的数据送入网口(A/D sample data buffer to fifo,and then read enable to ethernet.)

很不错的资源哦，这是我在实验室当年总结的关于nios timer的程序段(nios timer)

一个基于FPGA的串口程序,已经经过验证,对用FPGA做串口的朋友提供参考和借鉴!-an FPGA-based serial procedures have proven, right Serial do with FPGA reference for a friend and borrow!

Conduct a digital system ( electronic lock ) using hierarchic methodology . An electronic lock is a device that allows access or opening of a system , as long as the key or combination to enter match with which it is predefined in said lock .

基于verilog语言的数据选择器，包括数据选择器的测试模块 (verilog language based on the data selector, including data selection for the test module)

CAN驱动器MCP2515驱动，verilog编写，实测可用(CAN driver MCP2515 driver, Verilog written, measured available)

自己写的7人表决器的verilog程序，实现4人以上通过则通过的功能。(Seven people to write their own voting machine verilog program to achieve four or more people pass through function.)