基于fpga和xinlinx ise的串行通信vhdl程序，希望对你有所帮助！

用FPGA控制1602型液晶显示，显示一行英文语句。(show)

完成cmos摄像头对图像的捕捉，然后进行拼接通过USB进行传输。(complete picture capture)

_EDA实验讲义EDA实验指导书EDA技术与VHDL第3章EDA技术实用教程EAD技术与实践.等等资料-Experimental _EDA experimental guidance notes EDA books EDA technology and VHDL in Chapter 3 of EDA technologies utility EAD Technology and Practice Guide. And so on Information

Verilog 写的HDMI接口源程序及说明文档(HDMI interface verilog code and specificaiton paper)

成功解决FPGA设计时序问题的三大点.word说明文档，很详细(FPGA design timing problems successfully solved the three points)

系数为4的扰码生成器，并每四位扰码产生一个触发串并转换的触发信号，可用于4b/5b编码的触发信号。verilog程序，带test程序-coefficient of the four scrambler generator, and every four scrambler have triggered a string conversion and the trigger signal can be used to trigger 4b/5b coding signal. Verilog procedures, with test procedures

stepper motor module on spartan 6 and 24MHz clock fequency

采用FPGA实现的DDS波形发生器源码，可以实现频率幅值变换、正弦波、方波、三角波输出，输出频率可达1MHz(FPGA implementation of the DDS waveform generator source frequency amplitude transform, sine wave, square wave, triangle wave output, the output frequency up to 1MHz)

说明：  Digital pre-distortion (DPD) is an advanced digital signal-processing technique that mitigates the effects of power amplifier (PA) nonlinearity in wireless transmitters. DPD plays a key role in providing efficient radio digital front-end (DFE) solutions for 3G/4G basestations and beyond. Modern FPGAs are a promising target platform for the implementation of flexible wireless DFE solutions, including DPD.

-- Moore State Machine with explicit state encoding -- dowload from: www.fpga.com.cn & www.pld.com.cn--- Moore State Machine with explicit state encoding-- dowload from : www.fpga.com.cn