第八部分 EEPROM读写例程

应用背景此文件包含所有的源代码和脚本，以Altera公司的简单CPU的合成。500MHz时钟设计运行。 ；关键技术使用CLA提高速度的设计。这只是一个简单的CPU，它的结构很简单，它没有任何管道或类似的东西。

RISC-V 芯片设计规范,很有参考价值，开源芯片设计必备参考资料，希望对大家有帮助。(The RISC-V Foundation is chartered to standardize and promote the open RISC-V instruction set architecture)

说明：  高斯最小频移键控（Gaussian Filtered Minimum Shift Keying），这是GSM系统采用的调制方式。数字调制解调技术是数字蜂窝移动通信系统空中接口的重要组成部分。GMSK调制是在MSK（最小频移键控）调制器之前插入高斯低通预调制滤波器这样一种调制方式。GMSK提高了数字移动通信的频谱利用率和通信质量。(Gauss Filtered Minimum Shift Keying is a modulation method used in GSM system. Digital modem technology is an important part of air interface of digital cellular mobile communication system. GMSK modulation is a method of inserting a Gaussian low-pass pre-modulation filter before the MSK (minimum frequency shift keying) modulator. GMSK improves the spectrum utilization and communication quality of digital mobile communication.)

资源描述 视频解码之RGB转YUV模块(Verilog) 视频解码之RGB转YUV模块(Verilog) 视频解码之RGB转YUV模块(Verilog) 视频解码之RGB转YUV模块(Verilog) 视频解码之RGB转YUV模块(Verilog)

RobustVerilog生成verilog工具(RobustVerilog version)

a manual for design implementation of fpga and ASIC using verilog

TASKS OF TWO TYPES CAN BE RUN FOR EVERY 2 MIN.

实现在屏幕上显示绿色和红色相间的水平条纹。其中，vga_640x480模块将产生行同步信号hsyn和场同步信号 vsync; vga_stripes模块将产生red、green和blue三个输出。(The horizontal stripes of green and red are displayed on the screen. Among them, vga_640x480 module will produce line synchronization signal Hsyn and field synchronization signal vsync; vga_stripes module will produce red, green and blue three outputs.)

并行前缀加法器（也被称为carrytree

16位有符号和无符号乘法器FPGA源代码(16-bit signed and unsigned multiplier FPGA source code)