带控制器的数据通路实现链表读和累加

Verilog 实验代码。。。经典的，里面都是完整的项目文件。 ISE环境。(Verilog test code. . . Classic, which is a complete project file. ISE environment.)

说明：  汉明码学习，以（7，4）为例，仿真正常。(Hamming code learning, taking (7, 4) as an example, the simulation is normal.)

利用Verilog语言编写的RS-232串口转SPI的8位数据输出的源程序，里面有详细注释，利用ModelSim进行仿真测试，输入输出数据一样，真实可用。

有关gal器件的编程入门，以及常见逻辑门、计数器VHDL程序(For gal device programming entry, as well as common logic gates, counters VHDL program)

rs232+HT verilog 门级网表代码，需Synopsys DC 综合

Basic VHDL code to create a sine wave generator for an FPGA board.

说明：  本书介绍基于FPGA实现数字信号处理的原理与方法，作为Xilinx公司相关课程的培训教材(The FPGA implementation of DSP principle & method.)

模拟地铁自动售票机选票、付款、取票、找零等功能，包含软件仿真和硬件响应，可供仿真测试和FPGA验证。(Analog subway ticket vending machine ballots, payment, tickets, give change and other features, including software simulation and hardware response for simulation and FPGA verification test.)

例程是基于quartus的，FPGA通过EMIF给DSP发送数据，里面包含了一个简单的状态机和一个基于IP核的fifo，适合初学者(Routine is the FPGA to send data to the DSP via EMIF, which contains a simple state machine and an IP-based core fifo, suitable for beginners)

基于fpga的coms摄像头 扫描，参考文献，(Fpga based on the coms camera scan, reference literature,)