子字节的有效执行

这是一个HDB3的译码器，实现从HDB3双极性码到高低电平二值序列的转化-This is a decoder of the HDB3, HDB3 bipolar from high-low-level code to the conversion of binary sequences

interruption routine for PIC16F877

pc与fpga之间通过千兆以太网交换机实现网络通信(Network communication between PC and FPGA via Gigabit Ethernet switch)

AL422B,FPGA写的控制时序。XIWANGDUIDAJIAYOUYONG(AL422B,timing of AL422b.)

利用最新的嵌入式开发工具EDK，在FPGA 中完成对PDIUSBD12 的硬件定制和固件编程，从而在FPGA 中实现U S B 控制器， 并最终完成U S B 的枚举过程、驱动程序的开发和简单的应用。(Using the latest embedded development tools, EDK, in the FPGA completes its PDIUSBD12 custom hardware and firmware programming, in order to realize USB controller in the FPGA, and ultimately complete the USB enumeration process of driver development and simple应用.)

用于FPGA的huffman算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。(The huffman algorithm for FPGA HDL coding, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.)

使用verilog硬件设计语言在FPGA板子上STOPWATCH 秒表设计。(Using verilog hardware design language STOPWATCH stopwatch design on FPGA board.)

基于Verilog HDL的16位超前进位加法器 分为3个功能子模块-Verilog HDL-based 16-bit CLA is divided into three functional sub-modules

ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)

4X4 KEYPAD 的密码比较模块，可以核对6位的密码-4x4 KEYPAD password comparison module, can check the password 6