子字节的有效执行

fpga DCM使用教程 好几个文档 帮助您一次学会使用DCM(fpga the DCM using the tutorial a few documents to help you first learn to use the DCM)

利用verilog HDL逐点比较法实现直线和圆弧插补(Use verilog HDL by-point comparison method to achieve linear and circular interpolation)

NIOS II IDE 编程， uart_txd测试程序，仅供参考。-NIOS II IDE programming, uart_txd testing procedures, for information purposes only.

Design FPGA in Labview

verylog语言编程，为异步flipflop的程序。具有数据传输功能，数据位数可以用户设定(verylog language programming for asynchronous Flipflop procedures. With a data transmission function, data can be user set the median)

it is a multiplier used in RIsc architecture based processor.......

booth algotihm verilog design and test

按键控制数码管显示，从0到9显示，八位数码管(Button control digital tube display)

使用MATLAB完成CDMA系统的相关接收机，其中哈达码矩阵为128阶，仿真比特信噪比为-10DB-CDMA system using MATLAB to complete the relevant receivers, which Hadamard matrix of 128 bands, simulation-10DB-bit signal to noise ratio for

To increase simulation speed, ModelSim® can apply a variety of optimizations to your design. These include, but are not limited to, mergingprocesses, pulling constants out of loops, clock suppression, and signal collapsing. You control the level of optimization by specifying certain switches when you invoke the compiler.