子字节的有效执行

8位加法器源代码，vivado实现编写。(8 adder Source, vivado achieve write.)

硬件描述语言相关芯片程序源码Chip hardware description language-related program source code(Chip hardware description language-related program source Chip hardware description language-related program source code)

基于verilog的cpri接口代码，支持各种速率自由切换，量产产品实际应用代码(Cpri interface based on verilog code, support various rate free switch, production products the actual application code)

等精度测频原理的频率计程序与仿真。。希望大家能用的到撒(such precision frequency measurement principles of Cymometer procedures and simulation. . Hope everyone can withdraw to the)

掌握二-十进制(BCD码)异步计数器的工作原理和设计方法； 掌握中规模集成二-五-十进制异步计数器74LS90的功能及其应用；(Master II- Decimal (BCD code) the principle and an asynchronous counter design grasp the scale of integration in two- five- Decimal asynchronous counter 74LS90 features and applications )

说明：  多摩川绝对值编码器的NRG协议源代码,我们公司用的，我修改的解码程序(Tamagawa NRG absolute encoder protocol source code, used by our company, I modified decoding process)

sram 6bit仿真模型，verilog编写(sram 6bit simulation model, verilog prepared)

说明：  quartus的破解软件，里面有说明文档(Quartus crack software, which contains documentation.)

Modelsim+DC开发的4级流水线结构的MIPS CPU(mips 4level cpu)

USB2.0的VHDL描述，很经典了，欢迎大家下载-USB2.0 the VHDL description, very classic, and welcomes everyone to download