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cache 闪存 快速缓存
本代码是cache代码,采用最近最少使用算法。代码量大约1000-2000行,程序包括cache替换算法的实现。映像规则的选择,以及全部的仿真程序。
- 2022-07-02 02:46:57下载
- 积分:1
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encode_64_66
自编的64B/66B编码程序,下次上传解码程序。(the 64B/66B coding process is written by myself, i will upload the decoding process next time.)
- 2011-08-27 10:38:53下载
- 积分:1
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yiweijicunq
说明: 16位右移位寄存器
下面描述的是一个位宽为16位的右移位寄存器,实际具有环形移位的功能,是在右移位寄存器的基础上将最低位的输出端接到最高位的输入端构成的。其功能为当时钟上升沿到达时,输入信号的最低位移位到最高位,其余各位依次向右移动一位。(16-bit right shift register
The following description is a right shift register with a bit width of 16 bits. It actually has the function of circular shift. It is based on the right shift register, which connects the lowest bit output terminal to the highest bit input terminal. Its function is that when the rising edge of the clock arrives, the lowest displacement of the input signal reaches the highest position, and the rest of you move one bit to the right in turn.)
- 2020-08-18 09:58:21下载
- 积分:1
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rs-codec(255-223)
这是rs(255,223)编码的verilog源程序。里面有:encode、decode、test-bench等文件。(This is rs (255,223) verilog source coding. Inside : encode, decode, test-bench and other documents.)
- 2021-05-13 00:30:02下载
- 积分:1
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用verilog语言实现的huffman编码源程序
本压缩包,包换一个用verilog语言实现的huffman编码源程序,同时给出了众多论文和基础知识的文档资料,一应俱全。(The compression package, shifting one using huffman coding verilog language source code, and gives basic knowledge of many papers and documentation, everything.)
- 2013-09-11 10:55:28下载
- 积分:1
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Chip_74HC595
用Verilog描述了一款简单逻辑芯片74HC595的功能该芯片功能为:带输出锁存的8位移位寄存器(use the verilog to describe a simple chip 74HC595 with 8-Bit Serial-In, Parallel-Out Shift Reg and High-Current 3-State Outputs Reg)
- 2020-11-29 21:49:29下载
- 积分:1
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FPGA_OV5640_VGA_DDR3_code
说明: 基于OV5640摄像头的视频图像传输存储以及读取。供大家参考。(Video image transmission, storage and reading based on ov5640 camera. For your reference.)
- 2021-03-06 15:39:30下载
- 积分:1
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Example-3-1
说明: 经过验证的经典实例,完全正确的。适合于入门新手的实例,仅供交流使用。(fpga exampe)
- 2009-08-17 22:07:13下载
- 积分:1
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三八译码器
verilog编写的程序实现三八译码器功能,输入为3位,输出为8位,实现选择的功能。
verilog编写的程序实现三八译码器功能,输入为3位,输出为8位,实现选择的功能
- 2022-02-22 13:23:45下载
- 积分:1
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waveform-generator-o-VHDL-program
实现4种常见波形正弦、三角、锯齿、方波(A、B)的频率、幅度可控输出(方波
--A的占空比也是可控的),可以存储任意波形特征数据并能重现该波形,还可完成
--各种波形的线形叠加输出。
(Achieve the four kinds of common sine wave, triangle, sawtooth, square wave (A, B) the frequency and amplitude controlled output (square wave- A duty cycle is controlled), can store arbitrary waveform feature data and can to reproduce the waveform, it can perform- all kinds of linear superposition of the output waveform.)
- 2009-10-08 09:56:59下载
- 积分:1