sdrm 仿真模型

以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))

lacp代码，可以参照学习Lacp协议的相关状态机等知识(LACP code, can refer to the relevant state machine learning knowledge of Lacp protocol)

说明：  在Xilinx环境下编写的vhdl程序，实现推箱子的游戏任务，界面很漂亮。(Xilinx environment in the preparation of the VHDL program, realized the game viewing tasks, the interface is very beautiful.)

根据DDＲ3的特点和操作原理，利用MIG软件工具在Virtex－6系列FPGA中实现DDＲ3SDＲAM控制器的设计，并给出了硬件测试的结果,代码为verilog，通过仲裁机制完成设计，希望对学习fpga的人有帮助

运用quartus 软件模拟的电子琴，实现按键出现不同音调的音乐。(Quartus software simulation using keyboard, keys appear to achieve different tones of music.)

用VERILOG实现 交通灯控制，且运行正确，希望有帮助(Use VERILOG implementation traffic light control, and operation right, hope to have help)

实现dsp与fpga的emif的verilog异步实现，可实现异步读写以及相应功能模块控制，文件中包含仿真后的波形图形以及仿真测试程序，运行环境quartus ii11.0，仿真环境mmodelsim se 6.5d(Achieve dsp and fpga verilog asynchronous implementation of the emif, enabling asynchronous reading and writing as well as the corresponding function module control, the document contains graphics, and after the simulation waveform simulation testing procedures, operating environment quartus ii11.0, simulation environment mmodelsim se 6.5d)

工程实用观点，简单介绍集成电路的传统设计语言现状。(Practical engineering point of view, the traditional integrated circuit design brief language status.)

对一个256长度的，数据为0-9的数据序列，进行哈夫曼编码。

基于fpga的位同步信号提取仿真 使用vhdl语言 quartus(To use vhdl language quartus fpga bit synchronization signal extraction-based simulation)