amba apb v2.0

基于VHDL语言的串口发送和接收程序,自己调试通过，并已经运用在工程中(Based on the serial port to send and receive procedures VHDL language, its own debugging, and has been used in the project)

16级流水线型cordic旋转代码以及测试文件，亲测好用(16-stage pipelined cordic rotation code and test files, pro-testing)

实用Verilog编写的SVPWM程序，产生出SVPWM波形，可用于实现同步电机或者异步电机的空间矢量控制算法。(Practical Verilog of SVPWM written procedures, resulting in the SVPWM waveform can be used to implement the space vector control algorithm of the synchronous motor or induction motor.)

In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder. Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them includes all the VHDL source codes of the component.)

说明：  ask psk 编码调制的vhdl 实现(ask psk coded modulation to achieve the VHDL)

高精度直流信号源，DAC1220，20位分辨率，双极性输出(High-precision DC source, DAC1220,20 bit resolution, bipolar output)

zybo audio 音频播放，可以实现在pc端播放音乐然后在zybo上放出来，通过改变寄存器也可以从麦克风上我们自己说话然后通过音频口放出来

一个简单移位寄存器代码，verilog HDL编写(a simple shift register example，write with verilog HDL)

实现基于NIOS的 EP3C16与加速度传感器NMA7455的IIC基本通信(Realization of based on NIOS EP3C16 and acceleration sensor NMA7455 IIC of basic communication )

基于FPGA的VGA彩条测试实验，通过Verilog编写，程序通过一个key键控制几种显示模式之间的转换。。。分别有：纯色、彩条、过渡色、大方块、小方块等几种显示模式。。。因为都已在程序中设好，并没有加一些其他的模块调用。。。程序内的pll是48-40的，要用的话需根据需要更改。。分辨率有两种可供选择