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lab_5
Introduction to learn laboratry with altera quartus II 9.1
- 2016-12-12 01:24:52下载
- 积分:1
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LIFO堆栈实现(verilog)
包含三个文件,lifo主程序,sram代码,lifo测试程序
- 2022-01-24 17:21:25下载
- 积分:1
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ALU
包含一个ALU,实现斐波那契数列的计算。1.接受两个6位二进制输入。2.通过手动输入的时钟驱动每个周期进行一次计算。3.结果输出到led灯(使用NEXYS4开发板)(Including an ALU to realize the calculation of Fibonacci sequence. 1. Accept two 6-bit binary inputs. 2. Each cycle is driven by a clock input manually. 3. Output to LED lamp (using NEXYS4 development board))
- 2019-04-11 14:14:50下载
- 积分:1
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guardar 纪念馆 en 显示德 7 segmentos con 宝通德重置语言
电路在语言中建模与入席,保存和显示数据与一个重置按钮 7 分割。
- 2023-05-29 17:30:03下载
- 积分:1
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alarm
闹钟设计,VHDL,源代码。闹钟设计,VHDL,源代码。(Alarm clock design, VHDL, the source code.)
- 2011-05-23 18:30:29下载
- 积分:1
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tlc549adc
FPGA AD数据采集模块,实现模拟信号到数字信号转换。(FPGA AD data acquisition module, the analog signal to digital signal conversion.)
- 2021-04-14 21:08:55下载
- 积分:1
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pinlvji
verilog 简易频率计的设置,包括整个工程(verilog simple frequency meter settings, including the entire project)
- 2013-08-18 09:53:52下载
- 积分:1
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divisor
Time divisor vhdl code
- 2009-06-02 21:31:05下载
- 积分:1
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LS-versus-MMSE
这是基于MIMO-OFDM的同步算法研究的源程序。本程序采用的极大似然估计的方法。(This is based on MIMO-OFDM synchronization algorithm source code. The program uses the method of maximum likelihood estimates.
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- 2012-12-13 15:32:49下载
- 积分:1
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isjtc
Use serial programming examples matlab GUI implementation, Independent component analysis for image processing, Realize image watermarking, de-noising, plus noise and other functions.
- 2017-08-14 17:01:39下载
- 积分:1