数字频率计毕业论文 不是自己做的

VHDL implementation of RC6 encryption algorithm Test file represent applying all zero input and all zero key note that result is correct but bytes positions are swapped

VHDL Vendingmachine source

RS(255,223)编码器程序 从一本书上看到的，很不错的(RS(255,223) encode , very good good good )

介绍分频器的好资料。不光有奇数分频、偶数分频，还有小数分频。相信把这个资料理解透了后以后分频器的设计就不是问题了。(Introduction divider good information. Not only have an odd frequency, even frequency, there are fractional. I believe understanding this information through the post after the Divider is not a problem.)

绝对位置编码器biss与FPGA之间的通信(Absolute position encoder biss communication with FPGA)

基于basys2的简单的乒乓球小游戏，通过ise13.4开发，使用语言VHDL，能够通过VGA在显示屏显示，能够实现双人对打，有计分功能。(Simple table tennis game, based on basys2 through ise13.4 development, using VHDL language, can through the VGA display shows, can achieve a double play, scoring function.)

数字电子钟 此数字电子钟具有的功能包括： 1. 计时，时、分、秒显示； 2. 十二小时与二十四小时之间的转换； 3. 上下午显示； 4. 对时、分、秒的校时功能； 5. 跑表功能。-digital electronic clock this digital electronic clock with functions include : 1. Time, hours, minutes and seconds display; 2. 12 hours with 24 hours of conversion; 3. On the afternoon show; 4. Right hours, minutes, and seconds school function; 5. Stopwatch functions .

Simetrix搭建的一个光传输仿真工程，很好的学习参考。(Simetrix built an optical transmission simulation project, a good reference for learning.)

数字频率计 FPGA 用verilog语言编写-Digital Cymometer verilog language used FPGA

说明：  用于生成adams或recurdyn所需的路面不平度，用于悬架或其他的仿真(Adams or recurdyn used to generate the required road roughness for suspension or other simulation)