PCI IP核vhdl源码，Xilinx原版

FPGA实现DDS波形发生器，多种信号的产生，(FPGA realization of DDS waveform generator to produce a variety of signals,)

说明：  FPGA锁相环实验： 顶层文件加底层IP文件构成 top中例化ip核pll(Experiment of Phase-Locked Loop Based on FPGA)

FPGA Verilog控制FLASH片外读写(Verilog Controls FLASH Out-of-Chip Read-Write)

用于sopc builder添加组件用的ps/2 键盘 ipcore-Sopc builder used to add components used ps/2 keyboard IPCore

simple code of some kind of base decoder based on verilog

运用quartus 软件模拟的电子琴，实现按键出现不同音调的音乐。(Quartus software simulation using keyboard, keys appear to achieve different tones of music.)

example of BCH and RS codecs

FPGA设计的指导原则，很经典的！希望给大家方便-FPGA design of the guiding principles, it is classic! Want to give everyone easy

说明：  document qpsk vhdl code

We present elliptic curve cryptography (ECC) coprocessor, which is dual-field processor with projective coordinator. We have implemented architecture for scalar multiplication, which is key operation in elliptic curve cryptography. Our coprocessor can be adapted both prime field and binary field, also contains a control unit with 256 bit serial and parallel operations , which provide integrated highthroughput with low power consumptions. Our scalar multiplier architecture operation is perform base on clock rate and produce better performance in term of time and area compared to similar works. We used Verilog for programming and synthesized using Xilinx Vertex II Pro devices. Simulation was done with Modelsim XE 6.1e, VLSI simulation software from Mentor Graphics Corporation especially for Xilinx devices.