PCI IP核vhdl源码，Xilinx原版

Rotary Encoder Reading the Rotary Encoder and indicating the selection through a LED placed on the front panel. Events counter for the Rotary Encoder and displaying the events on the front panel Project: events counter for the rotary encoder and displaying the events on the SSD Pmod (Seven-Segments Display Programable module).

基于图像处理的中值滤波VHDL源码,能够实现对图像的滤波(Based on the median filter VHDL source image processing, image filtering can be achieved)

使用MATLAB完成CDMA系统的相关接收机，其中哈达码矩阵为128阶，仿真比特信噪比为-10DB-CDMA system using MATLAB to complete the relevant receivers, which Hadamard matrix of 128 bands, simulation-10DB-bit signal to noise ratio for

应用背景交通信号灯，自动检测有无行人，根据检测的状态来调节灯的状态，完整VHDL代码外加模拟仿真时序图关键技术 设计一个交通信号灯，有A、B两条路，装置自动检测A路口和B路口是否有人，RST信号能够将交通灯的状态置到A路绿灯亮，B路红灯亮，5秒钟检测一个状态，当A路口有人时，A路绿灯保持，每隔5秒检测一次，当A路口没有人了，绿灯变为黄灯，5S后再变为红灯，同时B路口变为绿灯，再5S后检测B是否有人，有人保持绿灯，没人变为黄灯，再变为红灯，依次进行~~

本CD-ROM包括《Verilog-HDL实践与应用系统设计》一书中的全部例子，这些例子全部通过了验证。第七章以后的设计实例，不仅有Verilog-HDL的例子，也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。 -the CD-ROM include "Verilog-HDL Practice and Application System Design," a book the whole Examples of these examples were passed certification. After the seventh chapter, a design example is not only Verilog-HDL example, the report include VB, VC and other source files, even DLL generator also described in detail.

making a simple clock using altera vhdl

从入门到精通，从简单到难，带你轻轻松松玩转FPGA(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)

篮球24s计时。计时器递减计数到零时，数码显示器显示‘0’并停止，同时发出报警信号(basketball 24 seconds)

VHDL硬件描述语言与数字逻辑电路设计,学习VHDL的好资料-VHDL hardware description language and digital logic circuit design, VHDL learning good information

AHBtoAPB设计基于AMBA总线协议的APB Bridge设计(AHB to APB designThe AHB to APB bridge interface is an AHB slave. When accessed (in normal operation or system test) it initiates an access to the APB.)